iC-MQ PROGRAMMABLE 9-BIT
Sin/Cos INTERPOLATION IC WITH RS422 DRIVER
Rev D4, Page 14/39
SERIAL CONFIGURATION INTERFACE
ENSL
Code
0
Adr 0x17, bit 3
The serial configuration interface consists of the two
pins SCL and SDA and enables read and write ac-
cess to an EEPROM with an I2C interface. The readout
clock rate can be selected using ENFAST.
Function
Normal operation
I2C Slave Mode Enable (Device ID 0x55)
1
Table 6: Config. Interface Mode
ENFAST
Code
0
Adr 0x00, bit 7
Function
The device ID for the EEPROM can be entered in reg-
ister DEVID(6:0) (address 0x00), from which iC-MQ
will take its configuration after exiting test mode (see
page 33). The DEVID stored therein is then accepted.
Regular clock rate, f(SCL) approx. 80 kHz
High clock rate, f(SCL) approx. 320 kHz
1
Notes
For in-circuit programming bus lines SCL and SDA
require pull-up resistors.
For line capacitances to 170 pF, adequate values
are:
4.7 kΩ with clock frequency 80 kHz
2 kΩ with clock frequency 320 kHz
Example of CRC Calculation Routine
unsigned char ucDataStream
int iCRCPoly 0x11D ;
unsigned char ucCRC=0;
int 0;
= 0;
The pull-up resistors may not be less than 1.5 kΩ.
To separate the signals a ground line between SCL
and SDA is recommended.
iC-MQ requires a supply voltage during EEPROM
programming (5 V to VDD).
=
i
=
ucCRC = 1; / / s t a r t value ! ! !
for ( iReg
= 0; iReg <47; iReg ++)
{
Table 5: Clock Frequency Configuration Interface
ucDataStream
for ( i =0; i <=7; i ++)
i f ( (ucCRC & 0x80 ) != ( ucDataStream & 0x80 ) )
ucCRC = (ucCRC << 1) iCRCPoly ;
else
ucCRC = (ucCRC << 1 ) ;
ucDataStream ucDataStream << 1;
= ucGetValue ( iReg ) ;
{
^
Once the supply has been switched on the iC-MQ out-
puts are high impedance (tristate*) until a valid config-
uration is read out from the EEPROM using device ID
0x50.
=
}
}
EEPROM Selection
The following minimal requirements must be fulfilled:
Bit errors in the 0x00 to 0x2F memory section are
pinpointed by the CRC deposited in register CHK-
SUM(7:0) (address 0x2F in the EEPROM; the CRC
polynomial used is "’1 0001 1101"’ with a start value
of "1").
• Operation from 3.3 to 5 V, I2C interface
• At least 512 bits, 64x8
(address range used is 0x00 to 0x3F)
Should the read configuration data not be confirmed
by the CRC, the readin process is repeated. If no valid
configuration data is available after a fourth readin, iC-
MQ terminates EEPROM access and switches to I2C
slave mode. This switch takes place after 150 ms at
the latest (see Electrical Characteristics, D11), for ex-
ample when no EEPROM is connected.
• Support of Page Write with Pages of at least 4
bytes. Errors can otherwise not be saved to the
EEPROM (EMASKE = 0x0).
• Device ID 0x50 "1010 000", no occupation of
0x55 (A2...A0 = 0). iC-MQ can otherwise not be
accessed via 0x55 in I2C slave mode.
For devices loading a valid configuration from the EEP-
ROM register bit ENSL decides whether the I2C slave Recommended device:
Atmel AT24C01B, ST
function is enabled or not.
M24C01W
ICHAUS [ IC-HAUS GMBH ]
