iC-MH8
12 BIT ANGULAR HALL ENCODER
Rev A0.9, Page 24/25
able. The addresses 0x10 to 0x1F and 0x77 are read-
only. With CFGPROT = ’1’, all registers except the ad-
dresses 0x7B and 0x7C are write-protected; the ad-
dresses 0x77 to 0x7F are readable, while all others
are read-protected.
100 nF
100 nF
Programming
Board
+ 5V
VPD VPA
VZAP
+ 7V
MA
SLI
iC-MH8
Serial
Interface
An internal programming algorithm for the ZAP diodes
is started by setting the bit PROGZAP. This process
can only be successful if the voltage at VZAP is greater
than 6.5 V and the test register TEST (2:0) is not set.
Following programming, the register is reset internally
again. In the process, the bit PROGOK is set in the
status register (address 0x77) when programming is
successful, and the bit PROGERR if it is not.
SLO
10 µF
100 nF
0V
VND VNA1 VNA2
Figure 26: Recommended setup for external program-
ming. A short low impedance path (shown in
light red) must be provided directly from pin
VZAP to pins VNA1, VNA2.
The ZAP memory can be tested by reading the regis-
ter range 0x10-0x1f. This test can be done with with a
higher readout current (Bit ENHC=1) to simulate dete-
riorated working conditions.
For reliable ROM writing, a low impedance connection
path as shown in Figure 26 must be established for the
VZAP blocking capacitor (about 100 nF) between pin
VZAP and pins VNA1, VNA2 to ensure stable VZAP
voltage during programming. A further capacitor of
10 µF which may be located externally (e.g. on the pro-
gramming board) is recommended for additional block-
ing purpose.
Figure 27: Example PCB layout showing low impedance
connection of capacitors to supply voltages
(VPA, VPD, VZAP) and common ground
A typical PCB layout may look like the one shown in
Figure 27.
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