IC-JRX 参数 Datasheet PDF下载

iC-JRX

µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS

Rev A1, Page 8/23

Control Word 5

(PWM enable and pin selection)

Bit

Name

7

-

6

-

5

-

4

PWMEN

3

PWMPN

2

PWM

ADR(2)

1

PWM

ADR(1)

Add.: 14

reset entry: 00h

0

PWM

ADR(0)

(r)

Bit 4

PWMEN

Bit 3

PWMPN

Bit 2..0

PWMADR 2..0

0

1

0

1

PWM "DISABLED"

PWM "ENABLED": the output selected with PWMADR receives the PWM signal. The relevant current

sources are switched off.

PWM signal active low

PWM signal active high

PWMADR2

0

0

0

0

1

1

1

1

PWMADR1

0

0

1

1

0

0

1

1

PWMADR0

0

1

0

1

0

1

0

1

Selected I/O pin

IO0 (control line PSEL0= 1)

IO1

IO2

IO3

IO4

IO5

IO6

IO7

(r)

PWM Register

Bit

Name

Bit 7..0

PWM7..0

Add.: 15

reset entry: 00h

6

PWM6

5

PWM5

4

PWM4

3

PWM3

2

PWM2

1

PWM1

0

PWM0

(r)

7

PWM7

'00'h

'...'h

'FF'h

Output stage "OFF" (continously)

Duration of the PWM signal in steps of 16× t(CLK)

Output stage "ON" (continously)

The PWM register determines the pulse length of the PWM signal. Output selection and enable are set via

Control Word 5.