Datasheet
DD2.X
PowerPC 750CL Microprocessor
Preliminary
4.3 Microprocessor Ball Placement
Figure 4-3. PowerPC 750CL Microprocessor Ball Placement
A6
A8
A3
A5
A2
A4
A0 DH31 DH25 DH26
NB
DH22 DH19 DH18 DH16 DH15 DH14
NB
DH9
DH6
DH10
DH5
DH4
GND
DH0
DH2
DH3
20
19
18
17
16
15
14
A13
A11
A12
A14
TT3
GND
A10
A1 DH29 NB DH28 DH23 DH24 DH21 DH20 NB DH17 DH11
DH8
GND
DH1
DH7
OVDD GND
OVDD GND
DH30 DH27
GND OVDD
VDD VDD
GND GND
OVDD OVDD
GND OVDD
DH12 DH13
OVDD GND
OVDD
PLL_CFG0
TT1 OVDD
A9
OVDD PLL_CFG1 PLL_CFG2
A15 GND NB
TS
A7
PLL_CFG3 GND SYSCLK
SYSCLK
EFUSE
AVDD
AGND
VDD
VDD
VDD
VDD
TSIZ0 TT2 OVDD TT0 GND
OVDD
GND GND
OVDD
GND
NB
OVDD PLL_CFG4
LSSD_
MODE
NB
TA
TT4 GND NB VDD
GND GND VDD
GND GND
VDD VDD VDD GND GND
VDD
GND L2_TSTCLK L1_TSTCLK
13
TSIZ1
GND GND
VDD VDD
MCP
CKSTP_OUT
HRESET
CKSTP_IN
INT
12
11
10
9
TBST TSIZ2 VDD GND OVDD GND
GND OVDD
GND OVDD
VDD
GND
GND
VDD TLBISYNC
NB
A18
A16 VDD GND OVDD GND
GND GND
VDD
SMI
BVSEL
NB
A17
VDD
VDD
GND VDD
GND GND VDD
OVDD
VDD GND
AACK
A20
NB GND A21 VDD
A19 OVDD A24 GND
VDD VDD VDD GND GND
VDD
QREQ
DBB
GND
QACK
8
GND GND
OVDD
GND
OVDD ARTRY
SRESET
7
THRM
D1
DBWO A23
THRMD2
VDD
TEA
ABB
6
A22
A28
A29
DL0
DL1
A
A26 GND A25 A31
GND OVDD
NB DL13
OVDD OVDD
GND GND
VDD VDD
OVDD GND
DL23 DL26
GND OVDD
CLK_OUT
CI
WT
GND
TDO
BG
DBG
NB
5
4
3
2
1
A27 OVDD
DL3
OVDD
A30
OVDD GND
OVDD GND
GND
OVDD
DL30
TRST
U
DRTRY
GND
GBL
W
BR
GND DL2 DL6 DL5 DL11 DL10 DL12 DL16 DL15 DL19 DL20 DL22 DL27 DL28
TCK
DL31
T
TDI
TMS
V
KVDD
KGND
Y
NB
DL4 DL8 DL7 DL9 DL14 NB
DL18 DL17 DL21 NB DL24 DL25 DL29
B
C
D
E
F
G
H
J
K
L
M
N
P
R
Note: This view is looking down from above the 750CL placed and soldered on the system board.
NB: There is no ball in this position.
Blank: There is no ball in this position.
NC: No connect - do not connect to this ball.
Dimensions and Signal Assignments
Page 40 of 70
Version 2.5
December 2, 2008
IBM [ IBM ]
