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IBMN325404CT3B-75H 参数 Datasheet PDF下载

IBMN325404CT3B-75H图片预览
型号: IBMN325404CT3B-75H
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 64MX4, 5.4ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54]
分类和应用: 时钟动态存储器光电二极管内存集成电路
文件页数/大小: 66 页 / 1699 K
品牌: IBM [ IBM ]
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IBMN325164CT3  
IBMN325804CT3  
IBMN325404CT3  
Preliminary  
256Mb Synchronous DRAM - Die Revision B  
Bank Activate Command  
In relation to the operation of a fast page mode DRAM, the Bank Activate command correlates to a falling  
RAS signal. The Bank Activate command is issued by holding CAS and WE high with CS and RAS low at the  
rising edge of the clock. The Bank Select address BA0 - BA1 is used to select the desired bank. The row  
address A0 - A12 is used to determine which row to activate in the selected bank. Activation of banks within  
both decks of a 2-High stacked device is allowed.  
The Bank Activate command must be applied before any Read or Write operation can be executed. The  
delay from when the Bank Activate command is applied to when the first read or write operation can begin  
must meet or exceed the RAS to CAS delay time (tRCD). Once a bank has been activated it must be pre-  
charged before another Bank Activate command can be applied to the same bank. The minimum time inter-  
val between successive Bank Activate commands to the same bank is determined by the RAS cycle time of  
the device (tRC). The minimum time interval between interleaved Bank Activate commands (Bank A to Bank B  
and vice versa) is the Bank to Bank delay time (t  
). The maximum time that each bank can be held active  
RRD  
is specified as t  
.
RAS(max)  
Bank Activate Command Cycle  
(CAS Latency = 3, tRCD = 3)  
T0  
T1  
T2  
T3  
Tn  
Tn+1  
Tn+2  
Tn+3  
CK  
. . . . . . . . . .  
Bank A  
Col. Addr.  
Bank A  
Row Addr.  
Bank B  
Row Addr.  
Bank A  
Row Addr.  
. . . . . . . . . .  
ADDRESS  
RAS-CAS delay (tRCD  
)
RAS - RAS delay time (tRRD  
)
Write A  
with Auto  
Precharge  
Bank B  
NOP  
Bank A  
Activate  
Bank A  
Activate  
. . . . . . . . . .  
NOP  
NOP  
NOP  
COMMAND  
Activate  
: “H” or “L”  
RAS Cycle time (tRC  
)
Bank Select  
The Bank Select inputs, BA0 and BA1, determine the bank to be used during a Bank Activate, Precharge,  
Read, or Write operation.  
Bank Selection Bits  
BA0  
0
BA1  
0
Bank  
Bank 0  
Bank 1  
Bank 2  
Bank 3  
1
0
0
1
1
1
©IBM Corporation. All rights reserved.  
Use is further subject to the provisions at the end of this document.  
06K0608.F39375A  
10/00  
Page 9 of 66  
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