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IBM3229P2815 参数 Datasheet PDF下载

IBM3229P2815图片预览
型号: IBM3229P2815
PDF下载: 下载PDF文件 查看货源
内容描述: [Packet Routing Switch, CMOS, PBGA624, 33 X 33 MM, BGA-624]
分类和应用: 电信电信集成电路
文件页数/大小: 199 页 / 1779 K
品牌: IBM [ IBM ]
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IBM PowerPRS Q-64G  
Preliminary  
Packet Routing Switch  
multicast high threshold for that priority. The difference between the multicast high and low thresholds for a  
priority causes hysteresis. Hysteresis reduces the number of times a change in multicast grant status  
preempts the insertion of subport grants in egress packet headers.  
To generate multicast grants, the PowerPRS Q-64G continuously compares the MCCount register value to  
the four multicast high thresholds and the four multicast low thresholds. However, the PowerPRS Q-64G  
multicast grant table is refreshed only once per packet cycle. This guarantees that all the attached devices  
receive the same flow control information.  
3.4.4 Shared Memory Overrun  
The PowerPRS Q-64G receives any incoming packet that has a store address, regardless of output queue  
and shared memory occupancy (unless the flow control latency function requires packet discard; see Section  
3.4.5). If a packet is received when the input controller does not have an available store address, the input  
controller discards the packet. This condition is reported in the no address interrupt bit in the Status Register  
(page 120). An interrupt is generated if the condition is not masked with the no address interrupt bit in the  
Interrupt Mask Register (page 122). This error occurs only if the shared memory threshold is programmed  
incorrectly, or if the attached device is not responding to the memory grant information.  
3.4.5 Flow Control Latency  
The input controller flow control latency function detects operational errors with the attached devices. This  
function is enabled with the flow control latency field in the Configuration 0 Register (page 110). When the  
flow control latency function is enabled, the input controller checks whether an incoming unicast packet is  
destined to an output for which neither an output queue grant nor a memory grant has been issued in the past  
n packet cycles. For a multicast packet, the input controller checks only the memory grant information. If the  
packet is destined for an output for which no grants have been issued, the packet is discarded. This error is  
reported via the flow control violation bit in the Status Register and, unless masked in the Interrupt Mask  
Register, the error generates a flow control violation interrupt. The violating ports are identified by the corre-  
sponding bits in the Flow Control Violation Register (page 132).  
Note: The PowerPRS Q-64G cannot verify whether the attached devices are processing the multicast  
grants. The PowerPRS Q-64G accepts multicast packets even when the multicast grant is removed.  
3.4.6 Best-Effort Discard  
In some applications, certain low-priority traffic is more important than the high-priority traffic that monopo-  
lizes the output port and prevents low-priority traffic from accessing the port. The best-effort discard function  
attempts to correct this situation by categorizing incoming traffic as either guaranteed bandwidthor best-  
effort bandwidth.Best-effort bandwidth traffic is discarded at the input controllers, when necessary, to pro-  
vide output port access to guaranteed traffic. The best-effort discard function helps to ensure guaranteed  
bandwidth traffic quality of service. This function is enabled with the best-effort discard enable bit in the  
Configuration 0 Register (page 110).  
When the PowerPRS Q-64G is operating as a lossy switch, the best-effort discard flow control function is acti-  
vated as soon as the aggregate traffic load for an output port exceeds its capacity for a given time period. The  
PowerPRS Q-64G discards only traffic flagged as best-effort; guaranteed bandwidth traffic is never  
discarded. Guaranteed bandwidth traffic congestion is managed through the normal flow control mechanism.  
Best-effort discard from the shared memory is completed in a single burst to minimize the number of affected  
packets.  
prsq-64g.01.fm  
December 20, 2001  
Functional Description  
Page 49 of 199