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IBM3229P2815 参数 Datasheet PDF下载

IBM3229P2815图片预览
型号: IBM3229P2815
PDF下载: 下载PDF文件 查看货源
内容描述: [Packet Routing Switch, CMOS, PBGA624, 33 X 33 MM, BGA-624]
分类和应用: 电信电信集成电路
文件页数/大小: 199 页 / 1779 K
品牌: IBM [ IBM ]
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IBM PowerPRS Q-64G  
Preliminary  
Packet Routing Switch  
3.4 Ingress Flow Control  
Note: In the flow control sections (that is, Sections 3.4 through 3.7), references to 32 ports and port ranges  
of 0 to 15 and 16 to 31 are specific to the PowerPRS Q-64G 512-Gbps configuration. Substitute 16 ports and  
port ranges of 0 to 7 and 8 to 15 for the 256-Gbps configuration.  
Ingress traffic flow to the PowerPRS Q-64G is controlled by a variety of mechanisms, primarily:  
Output queue grants that reflect the output queue occupancy. There is one output queue grant issued per  
subswitch element pair, per output, and per priority.  
Memory grants that reflect the shared memory occupancy. There is one memory grant issued for input  
ports 0 to 15 and one issued for input ports 16 to 31.  
Multicast grants that reflect the multicast packet use of shared memory. There is one multicast grant  
issued per subswitch element and per priority.  
As discussed in Section 3.3, the PowerPRS Q-64G inserts the grant status into egress data, control, service,  
and idle packet headers to convey these grants to the ingress side of the attached devices. These grants  
allow the devices to transmit packets to the PowerPRS Q-64G. Ingress traffic flow is also controlled by the  
flow control latency and best-effort discard functions. Each of these flow control mechanisms is discussed  
below.  
Note: An attached device transmits a unicast packet to the PowerPRS Q-64G only when it has received both  
the memory grant and the output queue grant for the destination output. An attached device transmits a mul-  
ticast packet to the PowerPRS Q-64G when it has received the memory grant, regardless of the output queue  
grant status and the multicast grant status. The PowerPRS Q-64G discards ingress packets destined for an  
output that lacks the correct output queue grant status (see Section 3.4.5 Flow Control Latency on page 49).  
3.4.1 Output Queue Grants  
Output queue grants:  
Prevent packets of a single priority destined for the same output from filling the shared memory.  
Prevent low-priority packets from occupying too much shared memory.  
The PowerPRS Q-64G issues one output queue grant per subswitch element pair (A and B, and C and D),  
per output port (0 to 31), and per priority (0 to 3). For a subswitch element, the PowerPRS Q-64G issues an  
output queue grant for an output priority when the total number of packets in the output queue is below the  
output queue threshold for that priority. The PowerPRS Q-64G inserts the output queue grant status into  
egress data, control, service, and idle packet headers. Ports 0 to 15 receive the status of the output queues in  
subswitch elements A and B; ports 16 to 31 receive the status of the output queues in subswitch elements C  
and D. The PowerPRS Q-64G removes the grant when the number of packets is equal to or greater than the  
threshold (there is no hysteresis). The four programmable output queue thresholds, one for each output  
priority, are accessed through the Threshold Access Register (page 114).  
To generate output queue grants, the PowerPRS Q-64G continuously compares the total packet count in  
each output queue to the four output queue thresholds. However, the PowerPRS Q-64G output queue grant  
table is refreshed only once per packet cycle. This guarantees that all the attached devices receive the same  
flow control information.  
prsq-64g.01.fm  
December 20, 2001  
Functional Description  
Page 47 of 199