IBM3229P2035
Advance
IBM Packet Routing Switch Serial Interface Converter
4.1.1.29 Event 2 _X and _Y Registers
Some of these register bits directly reflect the status of some chip input lines, so their value depends on those
lines.
Unused
Unused
Unused
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reset Output Status (Power-on-Reset, PE Reset)
Address in Word Mode
All ’0’s
x'88’
Address in Byte Mode
x'88 to 8B’
Access Type
Read/Write
Bits /
Word
Bits /
Bytes
Name
Description
31-24
23-16
15-12
7-0
7-0
7-4
Unused
Unused
Unused
1
0
IBM 28.4 G Packet Routing Switch Header Parity error checker (counter in @CC)
Normal Operation
11
10
9
3
2
1
0
IHPRTY_Err
IPERTY_Err
MAddPrtyErr
MDatPrtyErr
1
0
Ingress PE bus parity error (see register @CC for counter)
Normal Operation
1
0
Processor address parity error
Normal Operation
1
0
Processor data parity error
Normal Operation
8
1
Y path Fabric is not present or not fully inserted - information derived from
SWITCH_Y_PRESENT I/O pin
7
6
5
7
6
5
YPresent
YFPAE
0
1
Normal operation
Y path Fabric Port is not available (the DASL receiver for that switch port is not
synchronized - information is derived from FPAN_X I/O pin)
0
1
Normal operation
Switch Clock Y missing information is sensed at the output of the multiplexer that
allow to select the switch clock source
YSwClkE
0
Normal operation
Switch Board Y in service (Active/ready)
1
When switch Y in service is detected, remains active as long as switch Y is in ser-
vice.
4
3
4
3
YInServE
XPresent
0
1
Switch Y is in protection mode
X path Fabric is not present or not fully inserted (This information is directly
derived from SWITCH_X_PRESENT I/O pin
0
Normal operation
Note: Some of the bits in this register are directly forced by the hardware. Even if they are Read/Write, when the microprocessor writes
a value different from the current bit content, the hardware will immediately overwrite the microprocessor value.
prssi.02.fm
Converter Configuration Table Registers
Page 91 of 154
March 1, 2001