IBM3229P2035
IBM Packet Routing Switch Serial Interface Converter
Advance
3.3.4 Egress Packet Formatter
The Egress Packet Formatter is the interface between the egress FIFO and the PE interface logic which
translates the switch LU format into the egress packet format that matches the format expected by the PE.
The Egress Packet Formatter:
• Changes the position of the proper data bytes in the packet which have been moved in the ingress path
• Inserts the switch Output Queue Grant & Shared Memory Flow control information at the byte position
occupied by the bit map and some of the packet qualifier bits
• Inserts idle packets when there is no data packet to be sent
Figure 13: Example of Converter Egress Idle Packet
Byte
Byte 0
Byte 1
Byte 2
Byte 3
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Packet Qualifier
9
0
8
0
7
1
6
1
5
0
4
0
3
1
2
1
1
0
0
0
Word 0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Word 1 Output Queue Grant [31:24]
Output Queue Grant [23:16]
Output Queue Grant [15:8]
Output Queue Grant [7:0]
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
Word 15
Table 7: Packet Qualifier for Egress Idle Packet
Idle Packet
Bit 31
Bit 30
Bit 29
Bit 28
Bit 27
Bit 26
0
Bit 25
0
Bit 24
0
Shared
Memory
Status
Hold = ‘0’
Grant = ‘1’
Shared Memory Grant
Priority Level
Output Queue Grant
Priority Indicator
Bit Meaning
Memory Grant Priority
Level Definition
Highest
Medium High
Medium Low
Lowest
0
0
1
1
0
1
0
1
Output Queue Grant
Priority Indicator
Highest
Medium High
Medium Low
Lowest
0
0
1
1
0
1
0
1
Functional Description
Page 32 of 154
prssi.02.fm
March 1, 2001
IBM [ IBM ]
