IBM3229P2035
IBM Packet Routing Switch Serial Interface Converter
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When the bitmap field is defined for 32-bits but only 16 are used, only bits 16 through 31 of the BM field are
required to identify the 16 switch core ports. The others are considered to be part of the payload. The parity
sub-field of the Packet Qualifier field is calculated across the first three or five bytes (depending upon the
configuration).
For example, with header bytes in sequence the content of the bit positioning registers (@C8 for ingress and
@C4 for the egress) will be 0, 1, 2, 3, 1, as shown in the table below:
Content of Bit
Positioning Register
Header Bytes
Header Bytes in Incoming Packets
Notes
Packet qualifier
Bit Map 1
word 0
byte 0
byte 1
byte 2
byte 3
byte 0
0
1
2
3
1
word 0
word0
word0
word1
Bit Map 2
Bit Map 3
Bit Map 4
1
1. This last index is not 4 because during the second move operation this byte was moved from word 1 position 0 to word 0 position 1
The full packet is stored in the ingress LU formatter. Reshuffling starts when the first five words are received.
They are stored again in another set of five word buffers. The header information on which the switch acts to
route the packet to the appropriate output port is moved to the appropriate byte location in the master LU
during the cycles required to store the current packet’s remaining words. Byte swapping is done according to
the 16 bits stored in the configuration register @C8 (byte positioning in LU formatter).
Example of Bit Map Field in Single Word
Byte
Byte 0
Byte 1
Byte 2
Byte 3
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Packet Qualifier
9
8
7
6
5
4
3
2
1
0
Word 0
Word 1
Word 2
BM[31:24] BM1
BM[23:16] BM2
BM[15:8] BM3
BM[7:0] BM4
Word 15
When 16 (or 8)-port mode is used, only bits 31 - 16 of the BM field are required to identify the 16-switch core
ports. The others are considered to be part of the payload. The outgoing packet is made of four logical units
(LU0, LU1, LU2, and LU3), each 16-bytes wide. The following tables show how the bytes of the incoming
packet are rearranged inside the four logical units. Each line represents the content of each LU.
8x8 and 16x16 Switch LU Output Format:
Container
Master LU0
Slave LU1
Slave LU2
Slave LU3
C00 C01 C02 C03 C04 C05 C06 C07 C08 C09 C10 C11 C12 C13 C14 C15
Byte 0
Byte 1
Byte 2
Byte 3
PQ BM1 BM2
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Functional Description
Page 28 of 154
prssi.02.fm
March 1, 2001
IBM [ IBM ]
