IBM3229P2035
IBM Packet Routing Switch Serial Interface Converter
Advance
3. Functional Description
This chapter describes each functional block of the IBM Packet Routing Switch Serial Interface Converter
(the converter). The description is by layer and covers both the ingress and the egress functions because, in
general, they are completely symmetrical.
Figure 3: Converter Functional Block Diagram
DASL_DRV_ENB
AC_TEST_in
AC_TEST_out
PSRO
POR
DASL_X_RX7
DASL_X_RX7N
LU Serializer
CRC Insert
RXDATA[31:0]
RXPRTY
Receive
Synch/Idle/Yellow
Packet Generator
LU FRAMING
Interface_X
DASL_X_RX0
3 CELL FIFOs
3 CELL FIFOs
RX_INT
Ingress
Interface
Header
DASL_X_RX0N
RXSOP
RXPAV
RXENB
Insertion
Parity Check
Idle Discard
LU Serializer
CRC Insert
DASL_Y_RX7
Receive
Interface_Y
Synch/Idle/Yellow
Packet Generator
DASL_Y_RX7N
DASL_Y_RX0
ODD_OQG
EVEN_OQG
MEM_GNT_X [31:0]
Out of Band
Interface
DASL_Y_RX0N
MEM_GNT_Y [31:0]
SHARED_GNT
START_GCXFR
PE_CLK
PLL_PE
SWITCH_X_CLK
SWITCH_X_CLKN
Shadow_Rxclock_In
Shadow_Rxclock_Out
TO_SMOOTH_PLL_in
FROM_SMOOTH_PLL_out
PE_TXCLK_out
SWITCH_X_PLL
Clocks
Generator
SWITCH_Y_CLK
SWITCH_Y_CLKN
SWITCH_Y_PLL
PE_RXCLK_out
MP_CLK
MP_PRTY_ENB
MP_ADD[7:0]
MP_ADD_PRTY
MP_DATA_IO[7:0]
MP_DATA_PRTY
MP_SELN
JTAG / TEST / LSSD
ABIST/ LBIST
µp Interface
Configuration
Table
Registers
DASL_X_Y
DASL_X_TX7
CONTROLLER
DASL_X_TX7N
MP_INTN
MP_PRDY
DASL_X_TX0
MP_WRN
LU Deserializer
DASL_X_TX0N
MP_BURST_MODE
CRC Check
Header Extract
Header Checking
Transmit Data
Interface_X
TXDATA[31:0]
TXPRTY
TXSOP
6 CELL FIFOs
6 CELL FIFOs
DASL_Y_TX7
Word Framing
Header Insertion
Parity Generate
Idle Insertion
TX_INT
Egress
Interface
MUX
DASL_Y_TX7N
LU Deserializer
CRC Check
Transmit Data
Interface_Y
DASL_Y_TX0
Header Extract
Header Checking
TXFULL
DASL_Y_TX0N
TXENB
SWITCH_X_INSERVICE
SWITCH_Y_INSERVICE
Functional Description
Page 18 of 154
prssi.02.fm
March 1, 2001
IBM [ IBM ]
