IBM3229P2035
Advance
IBM Packet Routing Switch Serial Interface Converter
Table 46: Debug Control Field Definitions
Field Name
Function
An encoded value that selects the port for a given action. A request that utilizes the Port
Select field is processed at the next service time for the selected port. If the supplied
port value is out of range, the request will be processed for Port 0.
Port Select
An encoded value that selects the DASL receiver for a given action. If the supplied
DASL value is out of range, the request will be processed for DASL 0.
DASL Select
Reserved
Reserved. Should be low.
This 8-bit field will be read by the picoprocessor, incremented, and written back out of
the sdc_statusreg_out output.
Port Status Count
The status register contain various information about the processor status. The output of this register is
connected to the SDC_STATUSREG_OUT output.
Table 47: Status Register Definition
Bit
#
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Code Version
Code Revision
Reserved
Current Port ID
Status Count Output
Table 48: Data Aligned Serial Link (DASL) Signals for Synchronization
Signal Name
Description
DRIVER_ENABLE
Turns ON the DASL Drivers
Starts the picocode for synchronization operations. When active high, the picocode starts look-
ing at TX_SYNCREQ and SYNC_HUNT signals for DASL transmit and DASL receive synchro-
nization respectively.
PORT_ENABLE
Triggers the DASL serial data out. When active high, the data delivered to the DASL driver is
forced to a steady state high level. On falling edge, the data serialization starts.
TX_SYNCREQ
SYNC_HUNT
Starts DASL receiver synchronization based on incoming synchronization pattern.
10.6 Data Aligned Serial Link (DASL) Initialization and Operation
Once the chip has been fully configured, but before actual data traffic can take place between an IBM Packet
Routing Switch Serial Interface Converter (the converter) and an IBM 28.4G Packet Routing Switch (switch),
the DASL interfaces must be initialized to provide bit phase alignment and packet alignment at the data
receivers in both directions.
DASL initialization means communication between two chips: a converter and a switch core port.
The port synchronization is under the overall control of the system Control Processor which coordinates the
operation between the switch core and the adapters, but synchronization between the switch control and the
port adapter can also be performed directly through the interface lines, Fabric Port Available (FPA), and
Adapter Port Available (APA).
The registers of interest at both ends of the link are:
• Port enable register
prssi.02.fm
Appendix A: Data Aligned Serial Link (DASL)
Page 147 of 154
March 1, 2001