IBM3229P2035
Advance
IBM Packet Routing Switch Serial Interface Converter
Table 45: Interface Description for DASL Internal Signals (Page 2 of 3)
Signals
Direction
In
Description
SDC Port Quality Mask: indicates, when active, that the SDC Port Quality Bit
should be reset.
SDC_PORTQUALITYMASK
SDC Port Quality: indicates, when active, that the Shared DASL Controller has
detected a minimum eye violation on a port. This violation indicates that one or
more of the DASLs that make up the port is not operating within specification.
SDC_PORTQUALITY
Out
Application DASL Off Chip Interface
SERIAL_DATA_IN(0:7)
In
Serial Data Input: Serialized data stream received at the serial link speed
Serial Data Out: Serialized data stream generated at the serial link speed
SERIAL_DATA_OUT(0:7)
Diagnostic and Debug
Out
Processor Debug 0 Bus Enable: indicates, when active, debug information is
available on the M3_DEBUG0 bus. When not active, the M3_DEBUG0 bus will
be all zeros.
M3_DEBUG0_ENB
M3_DEBUG0(0:15)
M3_DEBUG1_ENB
In
Out
In
Debug 0 Bus
(0:1)
(2:4)
Reserved. All bits are set to zero.
ALU Status Bits. MSB = Bit 2
(5:15) PC (Program Counter). MSB = Bit 5
Processor Debug1 Bus Enable: indicates, when active, debug information is
available on the M3_DEBUG1 bus. When not active, the M3_DEBUG1 bus will
be all zeros.
Debug1 Bus (Instruction Decoder)
(0)
PX_AUTO_INCREMENT(14:15) From IDCD_CC unit. MSB = Bit 14
ACCESS_PX
(1)
(2)
PY_AUTO_INCREMENT
ACCESS_PY
(3)
(4:5)
(6:7)
(8:9)
(10)
(11)
(12)
(13)
ALU_A_SELECT. MSB = Bit 4
ALU_B_SELECT. MSB = Bit 6
DATA_WIDTH. MSB = Bit 8
IMMEDIATE_DATA_FROM_ INSTRUCTION
MUX1_CNTL
M3_DEBUG1(0:15)
Out
MUXQ_CNTL
MUXR_CNTL
(14:15) From IDCD_CC unit. MSB = Bit 14
SDC Debug Control Input
(0)
Debug Register Enable
(1)
Port Processing Disable
(2)
(3)
Temperature Compensation Disable
DASL Adjustment Disable
Encoded Debug Select -
(4:7)
SDC_DEBUGCONTROL(0:31)
In
(8:11) Port Select - See “Debug Control Input Definition”
(12:15) DASL Select - See “Debug Control Input Definition”
(16:23) Reserved. All bits are set to zero.
(24:31) Status Count Input - Used in conjunction with the Status Count Output
field of the SDC Status Register to create a watchdog mechanism.
The DASL Controller will increment this field by one and place the
result in the Status Count Output field of the SDC Status Register.
Contains the SDC Debug write data. The data is validated by an active Debug
Register Enable with a write command.
SDC_DEBUGDATA_IN(0:31)
SDC_DEBUGADDR(0:15)
In
In
Contains the SDC Debug address for read and write commands. The address
is validated by an active Debug Register Enable with a read/write command.
See “SDC Debug Interface Address Map”.
prssi.02.fm
Appendix A: Data Aligned Serial Link (DASL)
Page 143 of 154
March 1, 2001