Preliminary
PowerPC 750FL RISC Microprocessor
2.2 General Parameters
Table 2-1 provides a summary of the general parameters of the 750FL microprocessor.
Table 2-1. 750FL Microprocessor General Parameters
Item
Description
Notes
Technology
Die Size
0.13 μm CSOI technology, six-layer metallization plus one level of local interconnect
34.3 sq. mm
Transistor count
Logic design
38 million (including L2 cache)
Fully static
292-pin CBGA, reduced lead
21 × 21 mm (1.0 mm pitch,)
0.8 mm ball size
Package
Core power supply
I/O power supply
Notes:
1.45 V 50 mV
1
2
3.3 V 165 mV (BVSEL = 1, L1_TSTCLK = 0) or
2.5 V 125 mV (BVSEL = 1, L1_TSTCLK = 1) or
1.8 V 100 mV (BVSEL = 0, L1_TSTCLK = 1)
1. In some cases, when using 1.8 V or 2.5 V I/O mode, it is possible to reduce power dissipation by lowering the core power supply
voltage. See the datasheet supplement for details.
2. BVSEL = 0, L1_TSTCLK = 0 is not a valid setting. DD2.0 supports only a limited use of 3.3 V I/O mode. See the IBM PowerPC
750FX and 750FL RISC Microprocessor Errata List DD2.X for more information.
750flds60.fm.6.0
April 27, 2007
Overview
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