PowerPC 750FL RISC Microprocessor
Preliminary
2. Overview
The PowerPC 750FL RISC Microprocessor, also called the 750FL microprocessor, is targeted for high perfor-
mance, low power systems using a 60x bus. The 750FL microprocessor also includes an internal 512 KB L2
cache with on-board error correction code (ECC) circuitry.
2.1 Block Diagram
Figure 2-1 shows a block diagram of the PowerPC 750FL RISC Microprocessor.
Figure 2-1. PowerPC 750FL RISC Microprocessor Block Diagram
Control Unit
Instruction Fetch
Branch Unit
Completion
32 KB I-Cache
with Parity
BHT /
System
Dispatch
BTIC
Unit
GPRs
FPRs
LSU
FPU
FLU1
FLU2
Rename
Buffers
Rename
Buffers
Enhanced
60x
512 KB
32 KB D-Cache
with parity
L2 Tags
with parity
L2 Cache
w/ECC
BIU
Overview
750flds60.fm.6.0
April 27, 2007
Page 14 of 65
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