Preliminary
PowerPC 750FL RISC Microprocessor
• Power
– Low power consumption with low voltage application at lower frequency
– Dynamic power management
– Three static power save modes
(doze, nap, and sleep)
– Thermal Assist Unit (TAU)
• Bus interface
– 32-bit address bus
– 64-bit data bus (also supports 32-bit mode)
– Enhanced 60x bus: pipelines consecutive reads to a depth of 2
– Core-to-bus frequency multipliers of 3.5x, 4x, 4.5x, 5x, 5.5x, 6x, 6.5x, 7x, 7.5x, 8x, 8.5x, 9x, 9.5x, 10x,
11x, 12x, 13x, 14x, 15x, 16x, 17x, 18x, 19x, and 20x supported
– Supports 1.8 V, 2.5 V, or 3.3 V I/O modes
• Reliability and serviceability
- Parity checking on 60x interface
- ECC checking on L2 cache
- Parity on the L1 arrays
- Parity on the L1 and L2 tags
• Testability
– LSSD scan design
– Powerful diagnostic and test interface through common on-chip processor (COP) and IEEE 1149.1
Joint Test Action Group (JTAG) interface
750flds60.fm.6.0
April 27, 2007
General Information
Page 11 of 65
IBM [ IBM ]
