PowerPC 740 and PowerPC 750 Embedded Microprocessor
IBM CMOS 0.20 um Copper Technology EMPPC740L and EMPPC750L
DC Electrical Specifications
See Section “Recommended Operating Conditions,” on page 7, for operating conditions.
Characteristic
Symbol
VIH
Min
2.0
–
Max
–
Unit
V
Notes
1,2
Input high voltage (all inputs except SYSCLK)
Input low voltage (all inputs except SYSCLK)
SYSCLK input high voltage
VIL
0.8
–
V
CVIH
CVIL
IIN
2.4
–
V
1, 4
4
SYSCLK input low voltage
0.4
20
20
–
V
Input leakage current, VIN = OVDD
Hi-Z (off state) leakage current, Vin = OVDD
Output high voltage, IOH = –6mA
Output low voltage, IOL = 6mA
Capacitance, VIN =0 V, f = 1MHz
Note:
–
µA
µA
V
1,2
1,2
ITSI
–
VOH
VOL
2.4
–
0.4
5.0
V
CIN
–
pF
2,3
1. For 60x bus signals, the reference is OVDD, while L2OVDD is the reference for the L2 bus signals.
2. Excludes test signals LSSD_MODE, L1_TSTCLK, L2_TSTCLK, and IEEE 1149.1 signals.
3. Capacitance values are guaranteed by design and characterization, and are not tested.
4. SYSCLK input high and low voltage: I/O timings are measured using a “rail to rail” SYSCLK; I/O timing may be less favorable if SYSCLK does not travel
from GND to OVDD.
5/20/99
Version 1.51
PowerPC 740 and PowerPC 750 Datasheet
Page 9
IBM [ IBM ]
