Preliminary
CPC710 PCI Bridge and Memory Controller Data Sheet
Signal Lists
The following table lists all the external signals in alphabetical order and shows the ball number on which the
signal appears. Multiplexed signals are shown with the default signal (following reset) not in brackets and the
alternate signal in brackets. Multiplexed signals appear alphabetically multiple times in the list—once for each
signal name on the ball. The page number listed gives the page in “Signal Functional Description” on page 36
where the signals in the indicated interface group begin.
Signals Listed Alphabetically (Part 1 of 20)
Signal Name
Ball
D27
J10
Interface Group
Page
AV
Power
44
DD
BS0
BS1
SDRAM
39
J09
CE0_TEST
CHKSTOP
DLK
N23
J26
System
60x
43
36
36
G06
G27
H27
H26
60x
FLASH_CE
FLASH_OE
FLASH_WE
SIO
42
8
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