Preliminary
CPC710 PCI Bridge and Memory Controller Data Sheet
Signal Lists
The following table lists all the external signals in alphabetical order and shows the ball number on which the
signal appears. Multiplexed signals are shown with the default signal (following reset)
not
in brackets and the
alternate signal in brackets. Multiplexed signals appear alphabetically multiple times in the list—once for each
signal name on the ball. The page number listed gives the page in “Signal Functional Description” on page 36
where the signals in the indicated interface group begin.
Signals Listed Alphabetically
Signal Name
AV
DD
BS0
BS1
CE0_TEST
CHKSTOP
DLK
FLASH_CE
FLASH_OE
FLASH_WE
Ball
D27
J10
J09
N23
J26
G06
G27
H27
H26
(Part 1 of 20)
Interface Group
Power
SDRAM
System
60x
60x
SIO
Page
8
IBM [ IBM ]
