IBM16M64734BGA
64Mx72 1 Bank Registered DDR SDRAM Module
Preliminary
Electrical Characteristics and DC Operating Conditions
(0˚C ≤ TA ≤ 70°C; VDDQ = 2.5V ± 0.2V, VDD = + 2.5V ± 0.2V, see AC Characteristics)
Symbol
Parameter
Min
2.3
2.3
Max
2.7
Units
Notes
V
Supply Voltage
V
V
1
1
DD
V
I/O Supply Voltage
2.7
DDQ
Supply Voltage
I/O Supply Voltage
V
, V
0
0
V
SS
SSQ
V
I/O Reference Voltage
1.15
1.35
V
V
1, 2
1, 3
REF
V
I/O Termination Voltage (System)
V
− 0.04
V
+ 0.04
TT
REF
REF
Supply Voltage
SPD Supply Voltage
V
2.3
2.7
V
DDSPD
DQ0-63,CB0-7,
DQS0-17
V
V
+ 0.15
V
+ 0.3
DDQ
REF
V
Input High (Logic1) Voltage
Input Low (Logic0) Voltage
Address and
control inputs
V
1
1
IH(DC)
+ 0.18
V
V
+ 0.3
+ 0.3
REF
DDQ
DDQ
RESET
1.7
DQ0-63,CB0-7,
DQS0-17
− 0.3
V
− 0.15
− 0.18
REF
REF
V
Address and
control inputs
V
IL(DC)
-0.3
V
RESET
− 0.3
− 0.3
0.36
0.8
V
V
Input Voltage Level, CK and CK Inputs
V
+ 0.3
+ 0.6
V
V
1
IN(DC)
ID(DC)
DDQ
DDQ
Input Differential Voltage, CK and CK Inputs
V
1, 4
Address and
control inputs
− 5
5
Input Leakage Current
I
Any input 0V ≤ V ≤ V
(All other pins not under test = 0V)
DQ0-63,CB0-7,
DQS0-17
µA
µA
1
1
I
IN
DD
− 5
− 10
− 5
5
10
5
CK and CK
DQ0-63,CB0-7,
DQS0-17
Output Leakage Current
(DQs are disabled; 0V ≤ V ≤ V
I
OZ
out
DDQ
SDA
− 1
1
Output High Current
(VOUT = 1.95V)
I
− 15.2
mA
mA
1
1
OH
Output Low Current
(VOUT = 0.35V)
I
15.2
OL
1. Inputs are not recognized as valid until V
stabilizes.
REF
2. V
is expected to be equal to 0.5 V
of the transmitting device, and to track variations in the DC level of the same. Peak-to-
REF
DDQ
peak noise on V
may not exceed 2% of the DC value.
REF
3. V is not applied directly to the DIMM. V is a system supply for signal termination resistors, is expected to be set equal to V ,
REF
TT
TT
and must track variations in the DC level of V
.
REF
4. V is the magnitude of the difference between the input level on CK and the input level on CK.
ID
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
06K6597.H02812
3/00
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