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IBM11T8645HP-60T 参数 Datasheet PDF下载

IBM11T8645HP-60T图片预览
型号: IBM11T8645HP-60T
PDF下载: 下载PDF文件 查看货源
内容描述: [EDO DRAM Module, 8MX64, 60ns, CMOS]
分类和应用: 动态存储器内存集成电路
文件页数/大小: 32 页 / 903 K
品牌: IBM [ IBM ]
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Discontinued (9/98 - last order; 3/99 last ship)  
IBM11T8645HP  
8M x 64 144 PIN SO DIMM  
AC Characteristics (TA = 0 to +70°C, VCC = 3.3V ± 0.3V)  
1. An initial pause of 100µs is required after power-up followed by 8 RAS only refresh cycles before proper device operation is  
achieved. In case of using internal refresh counter, a minimum of 8 CAS before RAS refresh cycles instead of 8 RAS only refresh  
cycles is required.  
2. AC measurements assume tT=2ns.  
3. VIH(min.) and VIL(max.) are reference levels for measuring timing of input signals. Also, transition times are measured between VIH  
and VIL.  
4. Valid column addresses are only A0 through A10.  
Read, Write, Read-Modify-Write and Refresh Cycles (Common Parameters)  
-50  
-60  
Symbol  
Parameter  
Unit  
Notes  
Min  
84  
30  
8
Max  
Min  
104  
40  
10  
60  
10  
0
Max  
tRC  
tRP  
Random Read or Write Cycle Time  
RAS Precharge Time  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tCP  
CAS Precharge Time  
tRAS  
tCAS  
tASR  
tRAH  
tASC  
tCAH  
tRCD  
tRAD  
tRSH  
tCSH  
tCRP  
tOED  
tDZO  
tDZC  
tT  
RAS Pulse Width  
50  
8
100k  
100k  
100k  
100k  
CAS Pulse Width  
Row Address Setup Time  
Row Address Hold Time  
Column Address Setup Time  
Column Address Hold Time  
RAS to CAS Delay Time  
RAS to Col. Address Delay Time  
RAS Hold Time  
0
7
10  
0
0
7
10  
14  
12  
10  
50  
5
11  
9
37  
25  
45  
30  
1
2
8
CAS Hold Time  
40  
5
CAS to RAS Precharge Time  
OE to DIN Delay Time  
13  
0
15  
0
3
4
4
OE Delay Time From DIN  
CAS Delay Time From DIN  
Transition Time (Rise and Fall)  
0
0
1
50  
1
50  
1. Operation within the tRCD(max) limit ensures that tRAC(max) can be met. The tRCD(max) is specified as a reference point only: If tRCD  
is greater than the specified tRCD(max) limit, then access time is controlled by tCAC.  
2. Operation within the tRAD(max) limit ensures that tRAC(max) can be met. The tRAD(max) is specified as a reference point only: If tRAD  
is greater than the specified tRAD(max) limit, then access time is controlled by tAA.  
3. Either tCDD or tOED must be satisfied.  
4. Either tDZC or tDZO must be satisfied.  
©IBM Corporation. rights reserved.  
Use is further subject to the provisions at the end of this document.  
75H3164  
GA14-4479-02  
Rev 11/97  
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