IBM11S2325HP IBM11S4325HP
IBM11S2325HM IBM11S4325HM
2M/4M x 32 SO DIMM Module
Extended Data Out Cycle
-60
-6R
-70
Symbol
Parameter
Units Notes
Min. Max. Min. Max. Min. Max.
10 10K 10 10K 12 10K
tHCAS
tHPC
CAS Pulse Width (EDO Mode)
ns
ns
ns
ns
ns
ns
EDO Mode Cycle Time (Read/Write)
Data-out Hold Time from CAS
25
5
—
—
10
—
—
35
25
5
—
—
10
—
—
35
30
5
—
—
15
—
—
40
tDOH
tWHZ
tWPZ
tCPRH
tCPA
Output buffer Turn-Off Delay from WE
WE Pulse Width to Output Disable at CAS High
RAS Hold Time from CAS Precharge
Access Time from CAS Precharge
EDO Mode RAS Pulse Width
0
0
0
10
35
—
10
35
—
10
40
—
ns
1
tRASP
60 125K 60 125K 70 125K ns
1. Measured with the specified current load and 100pF at VOL = 0.8V and VOH = 2.0V.
Refresh Cycle
-60
-6R
-70
Symbol
tCHR
Parameter
Units Notes
Min
10
Max
—
Min
10
Max
—
Min
10
Max
—
CAS Hold Time
ns
ns
ns
(CAS before RAS Refresh Cycle)
CAS Setup Time
tCSR
5
—
—
—
5
—
—
—
5
—
—
—
(CAS before RAS Refresh Cycle)
WE Setup Time
tWRP
10
10
10
10
10
10
(CAS before RAS Refresh Cycle)
WE Hold Time
tWRH
ns
ns
(CAS before RAS Refresh Cycle)
tRPC
tREF
RAS Precharge to CAS Hold Time
Refresh Period
5
—
5
—
5
—
—
128
—
128
—
128
ms
1
1. 2048 refreshes are required every 128ms.
Self Refresh Cycle
-60
-6R
-70
Symbol
tRASS
tRPS
Parameter
Units
Notes
1
Min.
100
Max.
Min.
Max.
—
Min.
100
Max.
—
RAS Pulse Width
µs
ns
ns
—
—
—
100
110
-50
During Self Refresh Cycle
RAS Precharge Time
During Self Refresh Cycle
CAS Hold Time
104
-50
—
—
126
-50
—
—
1
tCHS
1, 2
During Self Refresh Cycle
CAS Hold Time From RAS Falling
During Self Refresh Cycle
tCHD
µs
350
—
350
—
350
—
1, 2
1. When using Self Refresh mode, the following refresh operations must be performed to ensure proper DRAM operation: If row
addresses are being refreshed in a EVENLY DISTRIBUTED manner over the refresh interval using CBR refresh cycles, then only
one CBR cycle must be performed immediately after exit from Self Refresh. If row addresses are being refreshed in any other
manner (ROR - Distributed/Burst; or CBR-Burst) over the refresh interval, then a full set of row refreshes must be performed imme-
diately before entry to and immediately after exit from Self Refresh.
2. If tRASS > tCHD (min) then tCHD applies. If tRASS ≤ tCHD (min) then tCHS applies.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
75H1718
SA14-4471-00
Revised 4/96
Page 9 of 21
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