IBM0612404GT3B
IBM0612804GT3B
Advance Rev 0.2
128Mb Double Data Rate Synchronous DRAM
Write to Write (Burst Length = 4)
Maximum DQSS
T1
T2
T3
T4
T5
T6
CK
CK
Write
NOP
Write
NOP
NOP
NOP
Command
Address
BAa, COL b
BAa, COL n
t
(max)
DQSS
DQS
DQ
DI a-b
DI a-n
DM
Minimum DQSS
T1
T2
T3
T4
T5
T6
CK
CK
Write
NOP
Write
NOP
NOP
NOP
Command
Address
BA, COL b
BA, COL n
t
(min)
DQSS
DQS
DQ
DI a-b
DI a-n
DM
DI a-b = data in for bank a, column b, etc.
3 subsequent elements of data in are applied in the programmed order following DI a-b.
3 subsequent elements of data in are applied in the programmed order following DI a-n.
A non-interrupted burst is shown.
Don’t Care
Each Write command may be to any bank.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
06K0566.F39350
5/00
Page 33 of 79
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