IBM04184BSLAC
IBM04364BSLAC
256K x 18 & 128K x 36 Standard Write SRAM
Preliminary
AC Characteristics (T = 0 to +85°C, V = 3.3V +10/-5%, V
= 2.5V 5%)
A
DD
DDQ
Symbol
tKHKH
Parameter
Min.
7.0
1.5
1.5
—
Max.
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Cycle Time
tKHKL
tKLKH
tKHQV
tAVKH
tKHAX
tSVKH
tKHSX
tWVKH
tKHWX
tDVKH
tKHDX
tKHQX
tKHQZ
tKHQX4
tGHQZ
tGLQX
tGLQV
tZZR
Clock High Pulse Width
Clock Low Pulse Width
Clock to Output Valid
—
—
3.5
—
1
Address Setup Time
0.5
1.0
0.5
1.0
0.5
1.0
0.5
1.0
1.0
—
Address Hold Time
—
Sync Select Setup Time
Sync Select Hold Time
Write Enables Setup Time
Write Enables Hold Time
Data In Setup Time
—
—
—
—
—
Data In Hold Time
—
Data Out Hold Time
—
1
1, 2
1, 2
1, 2
1, 2
1
Clock High to Output High-Z
Clock High to Output Active
Output Enable to High-Z
Output Enable to Low-Z
Output Enable to Output Valid
Sleep Mode Recovery TIme
Sleep Mode Enable TIme
3.5
—
0.5
—
3.5
—
0.5
—
3.5
—
7
3
tZZE
—
7
3
1. See AC Test Loading on page 7.
2. Verified by design and tested without guardband.
3. This specification is for No Data Retention. For data integrity at least 200ns of Recovery Time is recommended
coupled with a 0.5ns set-up time around K clock.
75H4340
July 25, 2000
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 8 of 20
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