IBM0316409C IBM0316809C
IBM0316169C
16Mbit Synchronous DRAM
Mode Register Operation (Address Input For Mode Set)
BS
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Address Bus (Ax)
Operation Mode
CAS Latency
BT
Burst Length
Mode Register (Mx)
Operation Mode
M11 M10 M9 M8 M7
0
X
0
X
0
1
0
0
0
0
Mode
Normal
Multiple Burst with
Single Write
Burst Type
M3
0
1
Type
Sequential
Interleave
CAS Latency
M6
0
0
0
0
1
1
1
1
M5
0
0
1
1
0
0
1
1
M4
0
1
0
1
0
1
0
1
Latency
Reserve
1
2
3
Reserve
Reserve
Reserve
Reserve
Burst Length
Length
M2
0
0
0
0
1
1
1
1
M1
0
0
1
1
0
0
1
1
M0
Sequential Interleave
0
1
0
1
0
1
0
1
1
2
4
8
Reserve
Reserve
Reserve
Full Page
1
2
4
8
Reserve
Reserve
Reserve
Reserve
07H3997
SA14-4711-02
Revised 05/96
©IBM Corporation, 1996. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 9 of 100
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