IBM0117805 IBM0117805M
IBM0117805B IBM0117805P
2M x 8 11/10 EDO DRAM
Refresh Cycle
-50
-60 / -6R
-70
Symbol
Parameter
Units
Notes
Min. Max. Min. Max. Min. Max.
CAS Setup Time
(CAS before RAS Refresh Cycle)
tCSR
tCHR
tWRP
5
—
—
—
5
—
—
—
5
—
—
—
ns
ns
ns
CAS Hold Time
(CAS before RAS Refresh Cycle)
10
10
10
10
10
10
WE Setup Time
(CAS before RAS Refresh Cycle)
WE Hold Time
(CAS before RAS Cycle)
tWRH
tRPC
10
5
—
—
10
5
—
—
10
5
—
—
ns
ns
RAS Precharge to CAS Hold Time
Self Refresh Cycle - Low Power version only
-50
-60
-70
Symbol
Parameter
Units
Notes
Min.
100
Max.
—
Min. Max. Min. Max.
RAS Pulse Width
tRASS
tRPS
tCHS
tCHD
µs
ns
ns
µs
100
104
-50
—
—
—
—
100
124
-50
—
—
—
—
1
During Self Refresh Cycle
RAS Precharge Time
During Self Refresh Cycle
89
-50
350
—
—
—
1
CAS Hold Time From RAS Rising
During Self Refresh Cycle
1, 2
1, 2
CAS Hold Time From RAS Falling
During Self Refresh Cycle
350
350
1. When using Self Refresh mode, the following refresh operations must be performed to ensure proper DRAM operation:
If row addresses are being refreshed in an EVENLY DISTRIBUTED manner over the refresh interval using CBR refresh cycles,
then only one CBR cycle must be performed immediately after exit from Self Refresh.
If row addresses are being refreshed in any other manner (ROR- Distributed/Burst; or CBR-Burst) over the refresh interval, then a
full set of row refreshes must be performed immediately before entry to and immediately after exit from Self Refresh.
2. If tRASS > tCHD (min) then tCHD applies. If tRASS ≤ tCHD (min) then tCHS applies.
Refresh
-50
Max.
-60 / -6R
Min. Max.
-70
Max.
SYMBOL
Parameter
Units
ms
Notes
1
Min.
—
Min.
—
SP version
LP version
32
—
—
32
32
tREF
Refresh Period
—
128
128
—
128
1. 2048 cycles.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
28H4724
SA14-4221-04
Revised 11/96
Page 11 of 29
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