IBM01164B0
IBM01164D0
4M x 4 Stacked DRAM
Read Cycle
-60
Max.
-70
Max.
Symbol
Parameter
Units
Notes
Min.
—
—
—
—
0
Min.
—
—
—
—
0
tRAC
tCAC
tAA
Access Time from RAS
Access Time from CAS
60
15
30
15
—
—
—
—
—
—
—
—
15
15
—
70
20
35
20
—
—
—
—
—
—
—
—
15
20
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1, 2, 3
1, 3
1, 2
3
Access Time from Address
Access Time from OE
tOEA
tRCS
tRCH
tRRH
tRAL
tCAL
tCLZ
tOH
Read Command Setup Time
Read Command Hold Time to CAS
Read Command Hold Time to RAS
Column Address to RAS Lead Time
Column Address to CAS Lead Time
CAS to Output in Low-Z
0
0
4
4
0
0
30
30
0
35
35
0
3
Output Data Hold Time
3
3
tOHO
tOFF
tOEZ
tCDD
Output Data Hold from OE
3
3
Output Buffer Turn-Off Delay
Output Buffer Turn-Off Delay from OE
CAS to DIN Delay Time
—
—
15
—
—
20
5
5
6
1. Operation within the tRCD(max.) limit ensures that tRAC(max.) can be met. tRCD(max.) is specified as a reference point only. If tRCD
is greater than the specified tRCD(max.) limit, then access time is controlled by tCAC
2. Operation within the tRAD(max.) limit ensures that tRAC(max.) can be met. tRAD(max.) is specified as a reference point only. If tRAD is
.
greater than the specified tRAD(max.) limit, then access time is controlled by tAA
.
3. Measured with the specified current load and 100pF.
4. Either tRCH or tRRH must be satisfied for a read cycle.
5. tOFF (max) and tOEZ (max) define the time at which the output achieves the open circuit condition and are not referenced to output
voltage levels.
6. Either tCDD or tODD must be satisfied.
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
28H4727
GA14-4248-01
Revised 11/96
Page 8 of 24