IBM01164B0
IBM01164D0
4M x 4 Stacked DRAM
Ordering Information
Part Number
Power Supply
3.3V
Speed
60ns
760ns
60ns
70ns
60ns
760ns
60ns
70ns
Package
IBM01164B0BT3 -60
IBM01164B0BT3 -70
IBM01164B0T3 -60
IBM01164B0T3 -70
IBM01164D0BT3 -60
IBM01164D0BT3 -70
IBM01164D0T3 -60
IBM01164D0T3 -70
400mil TSOJ 32- 2 High
400mil TSOJ 32- 2 High
400mil TSOJ 32- 2 High
400mil TSOJ 32- 2 High
400mil TSOJ 32- 4 High
400mil TSOJ 32- 4 High
400mil TSOJ 32- 4 High
400mil TSOJ 32- 4 High
3.3V
5.0V
5.0V
3.3V
3.3V
5.0V
5.0V
Block Diagram
Vss
Vcc
I/O0 I/O1 I/O2 I/O3
(to OCDs)
Regulator
4
4
V
DD
(internal)
OE
Data In Buffer
Data Out Buffer
WE
&
4
4
CAS Clock
Generator
CAS
Column Address
Buffer (10)
4
Column Decoder and I/O Gate
Sense Amplifiers
10
A0
10
A1
A2
A3
A4
A5
A6
A7
A8
Refresh
Controller
1024 x 4
Refresh Counter
(12)
Memory Array
4096 x 1024 x 4
12
A9
A10
A11
4096
Row Address
Buffer (12)
12
12
RAS Clock
Generator
RAS0 Deck 1
RAS1 Deck 2
RAS2 Deck 3
RAS3 Deck 4
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
28H4727
GA14-4248-01
Revised 11/96
Page 2 of 24
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