IBM01164B0
IBM01164D0
4M x 4 Stacked DRAM
Read-Modify-Write Cycle
tRWC
tRP
tRAS
VIH
RAS
VIL
tCSH
tRSH
tCAS
tCRP
tRCD
VIH
CAS
tRAD
tASC
VIL
tASR
tRAH
tCAH
VIH
VIL
Row
Column
Address
tCWD
tRWL
tCWL
tAWD
tRWD
tAA
tWP
VIH
VIL
WE
OE
tRCS
tOEH
VIH
VIL
tOEA
tDZC
tDH
tDS
tDZO
Hi-Z
VIH
VIL
DIN
DIN
tCAC
tCLZ
tODD
tOEZ
VOH
VOL
*
Hi-Z
Hi-Z
DOUT
DOUT
tRAC
tOHO
: “H” or “L”
*
tOEH greater than or equal to tCWL
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
28H4727
GA14-4248-01
Revised 11/96
Page 14 of 24