IBM01164B0
IBM01164D0
4M x 4 Stacked DRAM
Fast Page Mode Read Cycle
tRASP
tRP
VIH
tCPRH
RAS
VIL
tPC
tRCD
tCP
tCP
tRSH
tCAS
tCAL
tCRP
VIH
CAS
VIL
tCAS
tCAS
tCSH
tASC
tRAL
tASC
tRAH
tCAH
tASR
tCAH
tASC
tCAH
VIH
VIL
Address
Row
Column 1
Column 2
Column n
tRAD
tRCS
tRCS
tRCS
tRCH
tRCH
tRCH
VIH
VIL
WE
OE
tRRH
tAA
tAA
tAA
tCPA
tCPA
tOEA
tOEA
tOEA
VIH
VIL
tOHO
tOH
tOHO
tOH
tOHO
tOH
tDZC
tDZC
tDZC
tCDD
tODD
tDZO
tDZO
tDZO
tODD
tODD
VIH
VIL
DIN
tCAC
tCAC
tCAC
tOFF
tOEZ
tOFF
tOEZ
tOFF
tOEZ
tRAC
tCLZ
tCLZ
tCLZ
VOH
VOL
DOUT
DOUT
1
D
OUT 2
DOUT N
: “H” or “L”
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
28H4727
GA14-4248-01
Revised 11/96
Page 15 of 24