HY57V283220(L)T(P) / HY5V22(L)F(P)
AC CHARACTERISTICS I (AC operating conditions unless otherwise noted)
-5
-55
-6
-7
-H
-8
-P
-S
Parameter
Symbol
Unit Note
Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max
CAS Latency = 3
tCK3
tCK2
tCHW
tCLW
tAC3
tAC2
tOH
5
10
2
5.5
10
2.25
2.25
-
6
10
2.5
2.5
-
7
7.5
8
-10
3
3
-
10
10
3
3
-
10
12
3
3
-
ns
ns
System clock
cycle time
1000
1000
1000
1000
1000
1000
1000
1000
CAS Latency = 2
10
10
Clock high pulse width
Clock low pulse width
-
-
-
-
-
-
3
-
-
3
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1
2
3
3
CAS Latency = 3
-
4.5
6
-
5
6
-
5.5
6
-
-
5.5
6
-
-
5.5
6
-
6
6
-
6
6
-
6
6
-
Access time from
clock
2
CAS Latency = 2
-
-
-
-
-
-
-
-
Data-out hold time
1.5
1.5
1
2
2
2
1.75
1
2
1.75
1
2
2
1
2
1
2
1
2
1
1
-
2
2
1
2
1
2
1
2
1
1
-
2
2
1
2
1
2
1
2
1
1
-
3
1
1
1
1
1
1
1
1
Data-Input setup time
Data-Input hold time
Address setup time
Address hold time
tDS
-
1.5
1
-
1.5
1
-
-
-
-
-
-
tDH
-
-
-
-
-
-
-
-
tAS
1.5
1
-
1.5
1
-
1.5
1
-
1.75
1
-
1.75
1
-
-
-
-
tAH
-
-
-
-
-
-
-
-
CKE setup time
tCKS
tCKH
tCS
1.5
1
-
1.5
1
-
1.5
1
-
1.75
1
-
1.75
1
-
-
-
-
CKE hold time
-
-
-
-
-
-
-
-
Command setup time
Command hold time
CLK to data output in low Z-time
1.5
1
-
1.5
1
-
1.5
1
-
1.75
1
-
1.75
1
-
-
-
-
tCH
-
-
-
-
-
-
-
-
tOLZ
tOHZ3
tOHZ2
1
-
1
-
1
-
1
-
1
-
-
-
-
CAS Latency = 3
-
4.5
6
-
5
6
-
5.5
6
-
5.5
6
-
5.5
6
6
6
6
6
6
6
CLK to data output
in high Z-time
CAS Latency = 2
-
-
-
-
-
-
-
-
Note :
1.Assume tR / tF (input rise and fall time ) is 1ns
2.Access times to be measured with input signals of 1v/ns edge rate, 0.8v to 2.0v
3.Data-out hold time to be measured under 30pF load condition, without Vt termination
Rev. 0.9 / July 2004
9
HYNIX [ HYNIX SEMICONDUCTOR ]
