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HY29F002TT-55 参数 Datasheet PDF下载

HY29F002TT-55图片预览
型号: HY29F002TT-55
PDF下载: 下载PDF文件 查看货源
内容描述: 2兆位( 256K ×8 ) , 5伏只,闪存 [2 Megabit (256K x 8), 5 Volt-only, Flash Memory]
分类和应用: 闪存
文件页数/大小: 38 页 / 381 K
品牌: HYNIX [ HYNIX SEMICONDUCTOR ]
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HY29F002T  
Table 4. Composition of Command Sequences  
n In a Program command sequence, the Read/  
Reset command may be written between the  
sequence cycles before programming actually  
begins. This aborts the command and resets  
the device to the Read mode, or to the Erase  
Suspend mode if the Program command se-  
quence is written while the device is in the  
Erase Suspend mode. Once programming  
begins, however, the device ignores Read/Re-  
set commands until the operation is complete.  
Number of Bus Cycles  
Command  
Sequence  
Unlock Command  
Data  
Read/Reset 1  
Read/Reset 2  
Byte Program  
Chip Erase  
0
2
2
4
4
0
0
2
1
1
1
1
1
1
1
1
Note 1  
Note 1  
1
1
Sector Erase  
Erase Suspend  
Erase Resume  
Electronic ID  
1 (Note 2)  
n The Read/Reset command may be written be-  
tween the cycles in an Electronic ID command  
sequence to abort that command. As described  
above, once in the Electronic ID mode, the  
Read/ Reset command must be written to re-  
turn to the Read mode.  
0
0
Note 3  
Notes:  
1. Any number of Flash array read cycles are permitted.  
2. Additional data cycles may follow. See text.  
3. Any number of Electronic ID read cycles are permitted.  
Byte Program Command  
A Read/Reset command must be issued in order  
to read array data in the following cases:  
The host processor programs the device a byte at  
a time by issuing the Program command sequence  
shown in Table 5. The sequence begins by writ-  
ing two unlock cycles, followed by the Program  
setup command and, lastly, a data cycle specify-  
ing the program address and data. This initiates  
the Automatic Programming algorithm, which pro-  
vides internally generated program pulses and  
verifies the programmed cell margin. The host is  
not required to provide further controls or timings  
during this operation. When the Automatic Pro-  
gramming algorithm is complete, the device re-  
turns to the Read mode. Several methods are  
provided to allow the host to determine the status  
of the programming operation, as described in the  
Write Operation Status section.  
n If the device is in the Electronic ID mode, a  
Read/ Reset command must be written to re-  
turn to the Read mode. If the device was in the  
Erase Suspend mode when the device entered  
the Electronic ID mode, writing the Read/Re-  
set command returns the device to the Erase  
Suspend mode.  
Note: When in the Electronic ID bus operation mode,  
the device returns to the Read mode when VID is re-  
moved from the A[9] pin. The Read/Reset command is  
not required in this case.  
n If DQ[5] (Exceeded Time Limit) goes High dur-  
ing a program or erase operation, writing the  
reset command returns the sectors to the Read  
mode (or to the Erase Suspend mode if the  
device was in Erase Suspend).  
Commands written to the device during execution  
of the Automatic Programming algorithm are ig-  
nored. Note that a hardware reset immediately  
terminates the programming operation. To en-  
sure data integrity, the aborted program command  
sequence should be reinitiated once the reset  
operation is complete.  
The Read/Reset command may also be used to  
abort certain command sequences:  
n In a Sector Erase or Chip Erase command se-  
quence, the Read/Reset command may be  
written at any time before erasing actually be-  
gins, including, for the Sector Erase command,  
between the cycles that specify the sectors to  
be erased (see Sector Erase command de-  
scription). This aborts the command and re-  
sets the device to the Read mode. Once era-  
sure begins, however, the device ignores Read/  
Reset commands until the operation is com-  
plete.  
Programming is allowed in any sequence. Only  
erase operations can convert a stored 0to a 1.  
Thus, a bit cannot be programmed from a 0back  
to a 1. Attempting to do so will set DQ[5] to 1,  
and the Data# Polling algorithm will indicate that  
the operation was not successful. A Read/Reset  
command or a hardware reset is required to exit  
Rev. 4.1/May 01  
10  
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