HYUNDAI Micro Electronics
GMS800 Series
A. CONTROL REGISTER LIST
Initial Value
7 6 5 4 3 2 1 0
Undefined
Address
Register Name
Symbol
R/W
Page
00C0
00C1
00C2
00C3
00C4
00C5
00C6
00C7
00C8
00C9
00CA
00CB
00CC
00CD
00CE
00CF
00D0
R0 port data register
R0
R0IO
R1
R/W
W
39
39
40
40
40
40
40
40
40
40
41
41
41
41
42
42
49
50
49
56
49
49
61
50
61
56
60
69
66
66
72
72
71
71
77
62
R0 port I/O direction register
R1 port data register
0 0 0 0 0 0 0 0
Undefined
R/W
W
R1 port I/O direction register
R2 port data register
R1IO
R2
0 0 0 0 0 0 0 0
Undefined
R/W
W
R2 port I/O direction register
R3 port data register
R2IO
R3
0 0 0 0 0 0 0 0
Undefined
R/W
W
R3 port I/O direction register
R4 port data register
R3IO
R4
- - 0 0 0 0 0 0
Undefined
R/W
W
R4 port I/O direction register
R5 port data register
R4IO
R5
- - - - 0 0 0 0
Undefined
R/W
W
R5 port I/O direction register
R6 port data register
R5IO
R6
0 0 0 0 0 0 0 0
Undefined
R/W
W
R6 port I/O direction register
R7 port data register
R6IO
R7
0 0 0 0 0 0 0 0
Undefined
R/W
W
R7 port I/O direction register
Timer mode register 0
R7IO
TM0
- - 0 0 0 0 0 0
- - 0 0 0 0 0 0
0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
- - - - 0 0 0 0
1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 1
Undefined
R/W
R
Timer 0 register
T0
00D1
Timer 0 data register
TDR0
CDR0
TM1
W
Capture 0 data register
Timer mode register 1
R
00D2
00D3
R/W
W
Timer 1 data register
TDR1
T1PPR
T1
PWM 1 period register
Timer 1 register
W
R
00D4
PWM 1 duty register
T1PDR
CDR1
PWM1HR
BUR
SIOM
SIOR
IENH
IENL
IRQH
IRQL
IEDS
ADCM
R/W
R
Capture 1 data register
PWM 1 High register
00D5
00DE
00E0
00E1
00E2
00E3
00E4
00E5
00E6
00EA
W
Buzzer driver register
W
Serial I/O mode register
Serial I/O data register
Interrupt enable register high
Interrupt enable register low
Interrupt request flag register high
Interrupt request flag register low
External interrupt edge selection register
A/D converter mode register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0 0 0 0 - - - -
0 0 0 0 - - - -
0 0 0 0 - - - -
0 0 0 0 - - - -
- - - - 0 0 0 0
- 0 0 0 0 0 0 1
MAR. 2000
i