HYUNDAI MicroElectronics
GMS81C2012/GMS81C2020
EPROM Enable Delay Time after THLD1
TDLY1
THLD2
TDLY2
TCD1
200
100
200
100
100
nS
nS
nS
nS
nS
EPROM Enable Hold Time in Write Mode
EPROM Enable Delay Time after THLD2
CTL2,1 Setup Time after Low Address input and Data input
CTL1 Setup Time before Data output in Read and Verify Mode
TCD2
Table 21-2 AC/DC Requirements for Program/Read Mode
START
Set VDD=V
DD1H
Report
Verify failure
Verify fof all address
Report
Set VPP=V
IHP
Programming failure
NO
Verify OK
YES
NO
Verify blank
YES
Report
First Address Location
Programming OK
Next address location
VDD=VPP
END
=0v
Report
Programming failure
N=1
NO
YES
EPROM Write
Verify pass
100uS program time
NO
Verify pass
YES
Apply 3N program cycle
NO
Last address
YES
Figure 21-5 Programming Flow Chart
MAR. 2000 Ver 1.00
93
HYNIX [ HYNIX SEMICONDUCTOR ]
