HYUNDAI MicroElectronics
GMS82512/16/24
11.1 8-bit Timer / Counter Mode
The GMS825xx has four 8-bit Timer/Counters, Timer 0,
Timer 1, Timer 2, Timer 3. The Timer 0, Timer 1 are
shown in Figure .
T3SL1, T3SL0 of TM2 should not set to zero. These timers
have each 8-bit count register and data register. The count
register is increased by every internal or external clock in-
put. The internal clock has a prescaler divide ratio option
of 4, 16, 64 (selected by control bits TxSL1, TxSL0 of reg-
ister TMx).
The “timer” or “counter” function is selected by control
registers TM0, TM2 as shown in Table 11-1 and Table 11-
2. To use as an 8-bit timer/counter mode, bit CAP0 of TM0
is cleared to “0” and bits T1SL1, T1SL0 of TM0 or bits
7
6
5
4
3
2
1
0
ADDRESS: 0E2
INITIAL VALUE: 00
H
TM0
CAP0 T1ST T1SL1 T1SL0 BT0TSCTL T0CN T0SL1 T0SL0
H
0
X
X
X
X
X
01 or 10 or 11
X means don’t care
T0SL[1:0]
T0ST
EC0 PIN
XIN PIN
00
01
0: Stop
1: Clear and start
÷ 4
T0 (8-bit)
÷ 16
÷ 64
clear
10
11
TIMER 0
INTERRUPT
T0CN
T0IF
MUX
Comparator
TIMER 0
TDR0 (8-bit)
T1ST
T1SL[1:0]
0: Stop
1: Clear and start
÷ 4
01
10
÷ 16
÷ 64
T1 (8-bit)
clear
11
TIMER 1
INTERRUPT
MUX
T1IF
Comparator
TIMER 1
TDR1 (8-bit)
T1O PIN
F/F
Figure 11-2 8-bit Timer/Counter 0, 1
Example 1:
Example 2:
Timer0 = 4ms 8-bit timer mode at 4MHz
Timer1 = 1ms 8-bit timer mode at 4MHz
Timer0 = 8-bit event counter mode
Timer1 = 1ms 8-bit timer mode at 4MHz
LDM
LDM
LDM
SET1 T0E
SET1 T1E
EI
TDR0,#250
LDM
LDM
LDM
SET1 T0E
SET1 T1E
EI
TDR0,#250
TDR1,#250
TDR1,#250
TM0,#0110_1111B
TM0,#0110_1100B
FEB. 2000 Ver 1.00
35
HYNIX [ HYNIX SEMICONDUCTOR ]
