RFM23
Crystal Oscillator Load
Capacitance
R/W
xtalshift xlc[6]
xlc[5]
xlc[4]
xlc[3]
xlc[2]
xlc[1]
xlc[0]
40h
09
5.9. Regulators
There are a total of six regulators integrated onto the RFM23. With the exception of the IF and Digital all regulators
are designed to operate with only internal decoupling. The IF and Digital regulators both require an external 1 μF
decoupling capacitor. All of the regulators are designed to operate with an input supply voltage from +1.8 to +3.6 V,
and produce a nominal regulated output voltage of +1.7 V ±5%. The internal circuitry nominally operates from this
regulated +1.7 V supply. The output stage of the of PA is not connected internally to a regulator and is connected
directly to the battery voltage.
A supply voltage should only be connected to the VDD pins. No voltage should be forced on the IF or DIG regulator
outputs.
6. Data Handling and Packet Handler
6.1. RX and TX FIFOs
Two 64 byte FIFOs are integrated into the module, one for RX and one for TX, as shown in Figure 16. "Register 7Fh.
FIFO Access" is used to access both FIFOs. A burst write, as described in "3.1. Serial Peripheral Interface (SPI)", to
address 7Fh will write data to the TX FIFO. A burst read from address 7Fh will read data from the RX FIFO.
Figure 16. FIFO Thresholds
The TX FIFO has two programmable thresholds. An interrupt event occurs when the data in the TX FIFO reaches
these thresholds. The first threshold is the FIFO Almost Full threshold, txafthr[5:0]. The value in this register
corresponds to the desired threshold value in number of bytes. When the data being filled into the TX FIFO
reaches this threshold limit, an interrupt to the microcontroller is generated so the module can enter TX mode to
transmit the contents of the TX FIFO. The second threshold for TX is the FIFO Almost Empty Threshold,
txaethr[5:0]. When the data being shifted out of the TX FIFO reaches the Almost Empty threshold an interrupt will
be generated. The microcontroller will need to switch out of TX mode or fill more data into the TX FIFO. The
Transceiver may be configured so that when the TX FIFO is empty the module will automatically move to the Ready
37
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