RF42/43
Table 20. Interrupt or Status 2 Bit Set/Clear Description
Bit
7：4
3
Name
Reserved
iwut
Set/Clear Conditions
Reserved.
Wake time timer interrupt. Use as an interrupt, not as a status.
Low Battery Detect. When a low battery event is been detected this bit will be
set to 1. This interrupt event is saved even if it is not enabled by the mask
register bit and causes an interrupt after it is enabled. Probably the status is
cleared once the battery is replaced.
2
ilbd
Chip ready goes high once we enable the xtal, TX and a settling time for the
Xtal clock elapses. The status stay high unless we go back to Idle mode.
Power on status.
1
0
ichiprdy
ipor
Table 21. Detailed Description of Status Registers when not Enabled as Interrupts
Bit
7：4
3
Name
Reserved
iwut
Set/Clear Conditions
Reserved.
Wake time timer interrupt. Use as an interrupt, not as a status.
Low Battery Detect. When a low battery event is been detected this bit will be
set to 1. This interrupt event is saved even if it is not enabled by the mask
register bit and causes an interrupt after it is enabled. Probably the status is
cleared once the battery is replaced.
2
ilbd
Chip ready goes high once we enable the xtal, TX and a settling time for the
Xtal clock elapses. The status stay high unless we go back to Idle mode.
Power on status.
1
0
ichiprdy
ipor
60
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