HI-3200, HI-3201
PROGRAMMING THE AUTO-INITIALIZATION EEPROM.
Following reset, the HI-3200 may be completely
configured by automatically copying the contents of an
external EEPROM into HI-3200 memory and registers. An
SPI enabled 64KByte EEPROM is used for this purpose.
The EEPROM memory space is mapped to the HI-3200 as
shown in the diagram below.
host activity between steps 1 and 2, or 2 and 3, or if the
PROG pulse is less than 1 ms, the programming cycle will
not start and the device remains in the IDLE state.
Taking the PROG pin low initiates the cycle. The READY
pin goes low, and the contents of the HI-3200 memory and
registers are copied to the EEPROM. When copying is
All configuration memory blocks are copied. The ARINC
429 Received Data Memory contents,ARINC 429 Receive
log FIFO contents, and CAN Bus Received Data Memory
contents are not copied to or from the EEPROM.
complete, the HI-3200 executes a byte-by-byte
comparison of the EEPROM and its own register / memory
contents. If the verification completes successfully, the
READYpin goes high.
The HI-3200 can be used to program theAuto-Initialization
EEPROM. When the HI-3200 is in its IDLE state (RUN
input = “0”), a three step sequence must be performed to
begin the EEPROM programming cycle:
A 2’s complement of the checksum is also written to the
EEPROM at location 0x807F. The total read back
checksum should be zero. The following locations are
excluded from the checksum because they are either read-
only or unused locations: 0x8000 thru 0x800e, 0x8023 thru
0x802f, 0x8036 thru 0x805e, 0x8070 thru 0x807e.
1. Write data value 0x5A to HI-3200 memory address
0x8FFF.
If the comparison of the EEPROM contents and HI-3200
memory / register contents results in a discrepancy, the HI-
3200 enters the SAFE state, the PROGERR bit is set in the
Pending Error Register and the INToutput is asserted.
2. Write data value 0xA5 to HI-3200 memory address
0x8FFF.
3. Apply a positive pulse to the PROG input pin of at least 1
ms.
The user must clear the PROGERR issue before normal
operation can resume.
If the three-step sequence is interrupted by any intervening
0x8XXX
Configuration Registers
0x8000
0x8XXX
Configuration Registers
0x8000
0x7FFF
CAN TX ID Look-Up Table
0x7C00
0x7FFF
CAN TX ID Look-Up Table
0x7C00
0x7BFF
0x7BFF
Look-up Tables
Look-up Tables
0x79C0
0x79BF
0x7C00
0x79BF
CAN Bus
Transmit Schedule
Table
CAN Bus
Transmit Schedule
Table
0x6000
0x5FFF
0x6000
0x5FFF
ARINC 429 TX3
Transmit Schedule
Table
ARINC 429 TX3
Transmit Schedule
Table
0x5800
0x57FF
0x5800
0x57FF
ARINC 429 TX2
Transmit Schedule
Table
ARINC 429 TX2
Transmit Schedule
Table
0x5000
0x4FFF
0x5000
0x4FFF
ARINC 429 TX1
Transmit Schedule
Table
ARINC 429 TX1
Transmit Schedule
Table
0x4800
0x47FF
0x4800
0x47FF
ARINC 429 TX0
Transmit Schedule
Table
ARINC 429 TX0
Transmit Schedule
Table
0x4000
0x3FFF
0x4000
0x3FFF
CAN Bus
Receive Filters
CAN Bus
Receive Filters
0x3400
0x3FFF
0x3400
0x33FF
ARINC 429 Log FIFO Space
0x3000
0x2FFF
ARINC 429 / CAN
Receive Data
0x0000
0x0000
HI-3200 Memory
EEPROM
HOLT INTEGRATED CIRCUITS
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HOLTIC [ HOLT INTEGRATED CIRCUITS ]
