HI-3200, HI-3201
message, because memory pointer auto-increment
occurs after the label byte is output.
Op Code 0x90
Writes a CAN frame to the CAN transmit scheduler for
immediate transmission.
Op Code 0x9C
This command can be used to read just the most recent
CAN frame Information byte received, or may be used to
start a sixteen-byte read to output the entire sixteen-byte
received CAN frame memory block, because memory
pointer auto-increment occurs after the first byte is output.
Op Code 100101TT
Writes an ARINC 429 message to ARINC 429 transmit
scheduler TT for immediate transmission, where TT
represents the channel number.
TABLE 1. DEFINED INSTRUCTIONS
Auto
Increment
Number of
Data Bytes
OP CODE
Binary
OP CODE
Hex
DESCRIPTION
Yes
Yes
Yes
Yes
No
1++
00RRRR00 0x00 - 0x3C
01RRRR00 0x40 - 0x7C
Fast Register Read from register RRRR
1++
Fast Register Write to register RRRR
Read memory at address MAP
1++
10000000
10000100
10001000
10001100
10010000
100101TT
10011100
0x80
0x84
1++
Write memory at address MAP
2
0x88
Read MAP
No
2
0x8C
Write MAP
No
5 - 13
0x90
Transmit CAN Frame
No
4
0x94 - 0x97
0x9C
Transmit ARINC 429 message on transmit bus TT
Read CAN Frame at filter block <CIAR>
Read ARINC 429 FIFO # RRR. Reads exactly four bytes
Read ARINC block at receive channel RRR, label <ARIn>
Read ARINC message at receive channel RRR, label <ARIn>
No
16
Yes
No
4, 8, 12...
101RRR00 0xA0 - 0xBC
110RRR00 0xC0 - 0xDC
111RRR00 0xE0 - 0xFC
4
4
No
FAST-ACCESS SPI COMMANDS FOR REGISTERS 0-15
Command Bits 5:2 Convey the 4-Bit Register Address
COMMAND BITS
7 6 5 4 3 2 1 0
HEX
BYTE
FAST-ACCESS
READ
COMMAND BITS
7 6 5 4 3 2 1 0
HEX
BYTE
FAST-ACCESS
WRITE
0 0 0 0 0 0 0 0
0 0 0 0 0 1 0 0
0 0 0 0 1 0 0 0
0 0 0 0 1 1 0 0
0 0 0 1 0 0 0 0
0 0 0 1 0 1 0 0
0 0 0 1 1 0 0 0
0 0 0 1 1 1 0 0
0 0 1 0 0 0 0 0
0 0 1 0 0 1 0 0
0 0 1 0 1 0 0 0
0 0 1 0 1 1 0 0
0 0 1 1 0 0 0 0
0 0 1 1 0 1 0 0
0 0 1 1 1 0 0 0
0 0 1 1 1 1 0 0
0x00
0x04
0x08
0x0C
0x10
0x14
0x18
0x1C
0x20
0x24
0x28
0x2C
0x30
0x34
0x38
0x3C
Read APIR
Read AIAR0
Read AIAR1
Read AIAR2
Read AIAR3
Read AIAR4
Read AIAR5
Read AIAR6
Read AIAR7
Reserved
0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0
0 1 0 0 1 0 0 0
0 1 0 0 1 1 0 0
0 1 0 1 0 0 0 0
0 1 0 1 0 1 0 0
0 1 0 1 1 0 0 0
0 1 0 1 1 1 0 0
0 1 1 0 0 0 0 0
0 1 1 0 0 1 0 0
0 1 1 0 1 0 0 0
0 1 1 0 1 1 0 0
0 1 1 1 0 0 0 0
0 1 1 1 0 1 0 0
0 1 1 1 1 0 0 0
0 1 1 1 1 1 0 0
0x40
0x44
0x48
0x4C
0x50
0x54
0x58
0x5C
0x60
0x64
0x68
0x6C
0x70
0x74
0x78
0x7C
N/A (Read only)
N/A (Read only)
N/A (Read only)
N/A (Read only)
N/A (Read only)
N/A (Read only)
N/A (Read only)
N/A (Read only)
N/A (Read only)
Reserved
N/A (Read only)
N/A (Read only)
N/A (Read only)
N/A (Read only)
N/A (Read only)
Write MCR
Read PIR
Read CIAR
Read AMFF
Read ATRB
Read MSR
Read MCR
HOLT INTEGRATED CIRCUITS
49
HOLTIC [ HOLT INTEGRATED CIRCUITS ]
