HI-3200, HI-3201
CAN BUS RECEIVE OPERATION
The HI-3200 can receive CAN frames from a single CAN bus using an external HI-3110 IC to handle the CAN bus
protocol and physical layer connection
CAN Received Data Management
The HI-3200 interfaces to a CAN bus using an external HI-
3110 CAN Controller / Transceiver IC. Communication
between the HI-3200 and HI-3110 is handled by a
dedicated high speed serial SPI link. Configuration
parameters are automatically downloaded to the HI-3110
following a positive edge of the RUN input signal.
The number of filters active at any time is specified by
writing a “1” into the corresponding bit position of the CAN
Filter Enable look-up table. Only those filters identified as
active in the table will be used to determine whether the
frame is accepted.
A CAN Receive Interrupt look-up table mirrors the active
filter table. When a frame is accepted, and its
corresponding Interrupt enable look-up bit is a one, then the
CAN Interrupt bit is set in the Pending Interrupt Register. If
the Interrupt Mask Register does not mask the CAN
Interrupt, then the INT output signal will be asserted on
frame reception and the CAN filter number will be loaded
into the Interrupt Address Register.
The HI-3110 handles all aspects of the CAN protocol as well
as the physical layer interface to the CAN bus.
Received CAN frames are passed to the HI-3200 for
filtering and storage. Each incoming frame’s ID and first two
data bytes is compared against a bank of up to 256 user-
defined acceptance filters. If the frame meets the filter’s
acceptance criteria, it is stored in the CAN Received Data
Memory. Each acceptance filter consists of a 6-byte match
register and 6-byte mask. A frame is accepted if all
unmasked bits match the corresponding bits in the frame.
The frame is then written into the CAN received data
memory location corresponding to the filter number.
It is possible that a received CAN frame may meet the
acceptance criteria for more than one filter. In this case,
only the first (lowest filter number) filter is used to qualify
and store the incoming CAN frame.
The CAN Filter Enable look-up table, CAN Interrupt Enable
look-up table, Filter and Mask definition tables must be
loaded prior to turning on the CAN receiver, either via the
host CPU interface or from the auto-initialization EEPROM.
Mask bits are defined as 1 = care and 0 = don’t care. So for
any given CAN frame bit to generate a filter pass condition,
the received frame bit must equal the filter bit if the mask bit
is “1”, or any value if the mask bit is “0”.
CAN frames are stored as sixteen-byte blocks as shown in
the following diagram. Each block starts with a CAN frame
Status Byte.
CAN Bus Received Data Filter Enable Look-Up Table
Filter 0xFF
Filter 0xF8
Filter 0x08
0x79DF
CAN Bus Received Data Filter
Enable Look-Up Table
Filter 0x0F
0x79C0
7
6
5
4
3
2
1
0
Filter 0x00
Filter 0x01
Filter 0x07
HOLT INTEGRATED CIRCUITS
23
HOLTIC [ HOLT INTEGRATED CIRCUITS ]
