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HI-3111PCT 参数 Datasheet PDF下载

HI-3111PCT图片预览
型号: HI-3111PCT
PDF下载: 下载PDF文件 查看货源
内容描述: 航空电子与CAN收发器集成控制器 [Avionics CAN Controller with Integrated Transceiver]
分类和应用: 电子控制器航空
文件页数/大小: 53 页 / 178 K
品牌: HOLTIC [ HOLT INTEGRATED CIRCUITS ]
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HI-3110  
CONTROL REGISTER 1: CTRL1  
TX1MOSM  
CLKDCIVL1KDIV0  
(Write, SPI Op-code 0x16)  
(Read, SPI Op-code 0xD4)  
7
6
5
4
3
2
1
0
LSB  
MSB  
Bit Name  
R/W Default Description  
7
TXEN  
R/W  
0
Transmission Enable.  
This bit is logically ORed with theTXEN pin. When this bit is asserted, each message in the  
FIFO will be sequentially loaded to the transmit buffer and sent if the bus is available. If this bit  
is not set, a transmission can be enabled by either theTXEN pin or theTX1M bit. If theTXEN  
pin is pulled low during a transmission, the current message being transmitted will be  
completed. Any additional messages in the FIFO will not be transmitted.  
1
=
Enable transmission and send any messages in FIFO (until  
empty ifTXEN is held set).  
0
=
Wait for transmission enable orTX1M bit set before sending next  
message in FIFO.  
6
5
TX1M  
R/W  
R/W  
0
0
Enable transmission of only next message.  
This bit is applicable only ifTXEN = 0. It is reset automatically upon completion of a successful  
transmission or by initiation of transmission if the OSM bit is set.  
1
0
=
=
Enable transmission of only next message in FIFO whenTXEN = 0.  
Wait for transmission enable orTX1M bit set before sending next  
message in FIFO.  
OSM  
One-Shot Mode Enable.  
If enabled, the controller transmits only once and does not attempt re-transmission upon loss  
of arbitration or error. This feature is necessary to support the implementation of fixed time  
slots in theTime-Triggered CAN standard (TTCAN).  
1
0
=
=
Enable one-shot mode.  
Messages will re-transmit according to CAN protocol.  
4
FILTON  
R/W  
0
Filter on enable.  
This bit is set to turn on the HI-3110 CAN ID filtering mechanism. The default after reset is  
FILTON = 0, meaning filtering is turned off and every valid CAN message is accepted into the  
receive FIFO. Note: The device must be in initialization mode in order to program the  
acceptance filters and masks.  
1
0
=
=
Enable CAN ID filtering.  
No CAN ID filtering (every valid message accepted into  
receive FIFO).  
3
2
OSCOFF  
Not used  
R/W  
0
Oscillator off. This bit should be set to a one if an external clock is used. In this case the  
external clock is connected to the OSCIN pin and OSCOUTshould be left floating.  
1
0
=
=
Shuts off external OSCOUTpin.  
OSCOUTpin enabled.  
R/W  
R/W  
0
1-0 CLKDIV1:0  
00  
External CLKOUT division bits <1:0>  
00: Divide by 1.  
01: Divide by 2.  
10: Divide by 4.  
11: Divide by 8.  
HOLT INTEGRATED CIRCUITS  
18  
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