HT48R063/064/065/066/0662/067
HXT, ERC or the HIRC. The CLKMOD bit in the
CTRL0 register can be used to switch the system
clock from the selected high speed oscillator to the
low speed LXT oscillator. When the HALT instruction
is executed the LXT oscillator can be chosen to run or
not using the LXTEN bit in the CTRL2 register.
running but the WDT oscillator continues to free-run and
to keep the watchdog active. However, to preserve
power in certain applications the LIRC can be disabled
via a configuration option.
Operating Modes
For all devices, when the system enters the Sleep or
Idle Mode, the high frequency system clock will al-
ways stop running. The accompanying tables shows
the relationship between the CLKMOD bit, the HALT
instruction and the high/low frequency oscillators. The
CLMOD bit can change normal or Slow Mode.
By using the LXT low frequency oscillator in combina-
tion with a high frequency oscillator, the system can be
selected to operate in a number of different modes.
These Modes are Normal, Slow, Idle and Sleep.
·
Operating Mode Control
Mode Types and Selection
¨
HT48R063/HT48R064/HT48R065/HT48R066
The higher frequency oscillators provide higher perfor-
mance but carry with it the disadvantage of higher
power requirements, while the opposite is of course true
for the lower frequency oscillators. With the capability of
dynamically switching between fast and slow oscillators,
the device has the flexibility to optimise the perfor-
mance/power ratio, a feature especially important in
power sensitive portable applications.
OSC1/OSC2 Configuration
Operating
Mode
HIRC + LXT
HXT
ERC HIRC
HIRC
Run
LXT
Run
Run
Run
Normal
Slow
Run
¾
Run
¾
Run
¾
Stop
Stop
·
HT48R063/HT48R064/HT48R065/HT48R066
For these devices, if the LXT oscillator is used then
the internal RC oscillator, HIRC, must be used as the
high frequency oscillator. If the HXT or the ERC oscil-
lator is chosen as the high frequency system clock
then the LXT oscillator cannot be used for sharing the
same pins. The CLKMOD bit in the CTRL0 register
can be used to switch the system clock from the high
speed HIRC oscillator to the low speed LXT oscillator.
When the HALT instruction is executed and the device
enters the Idle/Sleep Mode the LXT oscillator will al-
ways continue to run. For these devices the LXT crys-
tal is connected to the OSC1/OSC2 pins and LXT will
always run (the LXTEN bit is not used).
Sleep
Stop
Stop
Stop
²¾² unimplemented
¨
HT48R0662/HT48R067
OSC1/OSC2
XT1/XT2
Configuration
Configuration
Operating
Mode
LXT
HXT ERC HIRC
LXTEN=0 LXTEN=1
Normal
Slow
Run Run Run
Stop Stop Stop
Stop Stop Stop
Stop Stop Stop
Run
Run
Stop
Stop
Run
Run
Run
Stop
Idle
Note that CLKMOD is only valid in HIRC+LXT oscilla-
tor configuration for HT48R063/HT48R064/
HT48R065/HT48R066.
Sleep
·
HT48R0662/HT48R067
For these devices the LXT oscillator can run together
with any of the high speed oscillators, namely the
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System Clock Configurations
Rev. 1.10
27
June 9, 2009
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
