HT46R01B/02B/01N/02N
HT48R01B/02B/01N/02N
Pin Name
Function OPT
I/T
O/T
Description
PAPU
PA6
ST
CMOS General purpose I/O. Register enabled pull-up and wake-up.
Oscillator pin
NMOS General purpose I/O. Register enabled wake-up.
PAWK
PA6/OSC1
OSC1
PA7
CO
PAWK
CO
OSC
ST
¾
PA7/RES
RES
VDD
VSS
ST
Reset input
Power supply
Ground
¾
¾
¾
VDD
VSS
PWR
PWR
¾
¾
Note: I/T: Input type
O/T: Output type
OPT: Optional by configuration option (CO) or register option
PWR: Power
CO: Configuration option
ST: Schmitt Trigger input
CMOS: CMOS output
The important point to note here is that the PB0 and PB1 pads will not be bounded to pins in the 10-pin MSOP
package. These two pads default to an input state, the designer should set the register PBPU to pull high op-
tions. In this way, these two internal pads can be pulled up in order to prevent input pin floating power con-
sumption.
HT48R01B/HT48R02B
Pin Name Function
OPT
I/T
O/T
Description
PAPU
PAWK
PA0
PA0
ST
CMOS General purpose I/O. Register enabled pull-up and wake-up.
PAPU
PAWK
PA1
PFD
PA2
TC0
PA3
INT
ST
¾
CMOS General purpose I/O. Register enabled pull-up and wake-up.
CMOS PFD output
PA1/PFD
CTRL0
PAPU
PAWK
ST
ST
ST
ST
ST
ST
ST
¾
CMOS General purpose I/O. Register enabled pull-up and wake-up.
PA2/TC0
PA3/INT
External Timer 0 clock input
CMOS General purpose I/O. Register enabled pull-up and wake-up.
External interrupt input
CMOS General purpose I/O. Register enabled pull-up and wake-up.
External Timer 1 clock input
¾
¾
PAPU
PAWK
¾
¾
PAPU
PAWK
PA4
TC1
PA5
OSC2
PA6
PA4/TC1
PA5/OSC2
¾
¾
PAPU
PAWK
CMOS General purpose I/O. Register enabled pull-up and wake-up.
OSC Oscillator pin
CO
PAPU
PAWK
ST
CMOS General purpose I/O. Register enabled pull-up and wake-up.
PA6/OSC1
PA7/RES
OSC1
PA7
CO
PAWK
CO
OSC
ST
Oscillator pin
NMOS General purpose I/O. Register enabled wake-up.
¾
RES
VDD
VSS
ST
Reset input
Power supply
Ground
¾
¾
¾
VDD
VSS
PWR
PWR
¾
¾
Rev.1.10
4
February 12, 2010