HT46R01B/02B/01N/02N
HT48R01B/02B/01N/02N
The following diagram illustrates the addressing/data
flow of the look-up table:
dress ²F06H² or 6 locations after the start of the last
page. Note that the value for the table pointer is refer-
enced to the first address of the present page if the
²TABRDC [m]² instruction is being used. The high byte
of the table data which in this case is equal to zero will
be transferred to the TBLH register automatically when
the ²TABRDL [m]² instruction is executed.
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Because the TBLH register is a read-only register and
cannot be restored, care should be taken to ensure its
protection if both the main routine and Interrupt Service
Routine use the table read instructions. If using the table
read instructions, the Interrupt Service Routines may
change the value of TBLH and subsequently cause er-
rors if used again by the main routine. As a rule it is rec-
ommended that simultaneous use of the table read
instructions should be avoided. However, in situations
where simultaneous use cannot be avoided, the inter-
rupts should be disabled prior to the execution of any
main routine table-read instructions. Note that all table
related instructions require two instruction cycles to
complete their operation.
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Table Program Example
The accompanying example shows how the table
pointer and table data is defined and retrieved from the
device. This example uses raw table data located in the
last page which is stored there using the ORG state-
ment. The table pointer is setup here to have an initial
value of ²06H². This will ensure that the first data read
from the data table will be at the Program Memory ad-
Table Location Bits
Instruction
b10
PC10
1
b9
PC9
1
b8
PC8
1
b7
@7
@7
b6
@6
@6
b5
@5
@5
b4
@4
@4
b3
@3
@3
b2
@2
@2
b1
@1
@1
b0
@0
@0
TABRDC [m]
TABRDL [m]
Table Location
Note: HT46R01B/HT48R01B/HT46R01N/HT48R01N: PC9~PC8: Current program Counter bits
HT46R02B/HT48R02B/HT46R02N/HT48R02N: PC10~PC8: Current program Counter bits
@7~@0: Table Pointer TBLP bits
·
Table Read Program Example - 1K ROM size
tempreg1 db
tempreg2 db
?
?
; temporary register #1
; temporary register #2
:
:
mov a,06h
; initialise table pointer - note that this address is referenced
; to the last page or present page
mov tblp,a
:
:
tabrdl
tempreg1 ; transfers value in table referenced by table pointer to tempregl
; data at prog. memory address ²306H² transferred to tempreg1 and TBLH
dec tblp
tabrdl
; reduce value of table pointer by one
tempreg2 ; transfers value in table referenced by table pointer to tempreg2
; data at prog.memory address ²305H² transferred to tempreg2 and TBLH
; in this example the data ²1AH² is transferred to
; tempreg1 and data ²0FH² to register tempreg2
; the value ²00H² will be transferred to the high byte register TBLH
:
:
org 300h
; sets initial address of last page
dc 00Ah, 00Bh, 00Ch, 00Dh, 00Eh, 00Fh, 01Ah, 01Bh
:
:
Rev.1.10
14
February 12, 2010
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
