HT48R063B/064B/065B/066B
·
PFD Programming Example
org 04h
; external interrupt vector
org 08h
jmp tmr0int
; Timer Counter 0 interrupt vector
; jump here when Timer 0 overflows
:
:
org 20h
:
;internal Timer 0 interrupt routine
; main program
:
tmr0int:
:
; Timer 0 main program placed here
:
:
begin:
;setup Timer 0 registers
mov a,09bh
mov tmr0,a
mov a,081h
mov tmr0c,a
; setup Timer 0 preload value
; setup Timer 0 control register
; timer mode and prescaler set to /2
;setup interrupt register
mov a,00dh
mov intc0,a
; enable master interrupt and both timer interrupts
:
:
set tmr0c.4
; start Timer 0
:
:
Time Base
The device includes a Time Base function which is used to generate a regular time interval signal.
The Time Base time interval magnitude is determined using an internal 13 stage counter sets the division ratio of the
clock source. This division ratio is controlled by both the TBSEL0 and TBSEL1 bits in the CTRL1 register. The clock
source is selected using the T0S bit in the TMR0C register.
When the Time Base time out, a Time Base interrupt signal will be generated. It should be noted that as the Time Base
clock source is the same as the Timer/Event Counter clock source, care should be taken when programming.
Rev. 1.00
44
April 7, 2011