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HT46R065D 参数 Datasheet PDF下载

HT46R065D图片预览
型号: HT46R065D
PDF下载: 下载PDF文件 查看货源
内容描述: 增强A / D型MCU,具有高电流LED驱动器 [Enhanced A/D Type MCU with High Current LED Driver]
分类和应用: 驱动器
文件页数/大小: 114 页 / 744 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT46R064D/065D/066D  
Enhanced A/D Type 8-Bit OTP MCU with LED Driver  
The Z, OV, AC and C flags generally reflect the status of the latest operations.  
In addition, on entering an interrupt sequence or executing a subroutine call, the status register will not  
be pushed onto the stack automatically. If the contents of the status registers are important and if the  
interrupt routine can change the status register, precautions must be taken to correctly save it. Note that  
bits 0~3 of the STATUS register are both readable and writeable bits.  
STATUS Register  
Bit  
Name  
R/W  
7
6
5
TO  
R
4
PDF  
R
3
OV  
R/W  
x
2
Z
1
AC  
R/W  
x
0
C
¾
¾
¾
¾
¾
¾
R/W  
x
R/W  
x
POR  
0
0
²x² unknown  
Bit 7, 6  
Bit 5  
unimplemented, read as ²0²  
TO: Watchdog Time-Out flag  
0: After power up or executing the ²CLR WDT² or ²HALT² instruction  
1: A watchdog time-out occurred.  
Bit 4  
Bit 3  
PDF: Power down flag  
0: After power up or executing the ²CLR WDT² instruction  
1: By executing the ²HALT² instruction  
OV: Overflow flag  
0: no overflow  
1: an operation results in a carry into the highest-order bit but not a carry out of the  
highest-order bit or vice versa.  
Bit 2  
Bit 1  
Z: Zero flag  
0: The result of an arithmetic or logical operation is not zero  
1: The result of an arithmetic or logical operation is zero  
AC: Auxiliary flag  
0: no auxiliary carry  
1: an operation results in a carry out of the low nibbles in addition, or no borrow from the  
high nibble into the low nibble in subtraction  
Bit 0  
C: Carry flag  
0: no carry-out  
1: an operation results in a carry during an addition operation or if a borrow does not take place  
during a subtraction operation  
C is also affected by a rotate through carry instruction.  
Input/Output Ports and Control Registers  
Within the area of Special Function Registers, the port PA, PB, etc data I/O registers and their  
associated control register PAC, PBC, etc play a prominent role. These registers are mapped to specific  
addresses within the Data Memory as shown in the Data Memory table. The data I/O registers, are  
used to transfer the appropriate output or input data on the port. The control registers specifies which  
pins of the port are set as inputs and which are set as outputs. To setup a pin as an input, the  
corresponding bit of the control register must be set high, for an output it must be set low. During  
program initialisation, it is important to first setup the control registers to specify which pins are  
outputs and which are inputs before reading data from or writing data to the I/O ports. One flexible  
feature of these registers is the ability to directly program single bits using the ²SET [m].i² and ²CLR  
[m].i² instructions. The ability to change I/O pins from output to input and vice versa by manipulating  
specific bits of the I/O control registers during normal program operation is a useful feature of these  
devices.  
Rev. 1.00  
23  
January 12, 2011  
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