HT46R064D/065D/066D
Enhanced A/D Type 8-Bit OTP MCU with LED Driver
CTRL1 Register
Bit
Name
R/W
7
INTEG1
R/W
1
6
INTEG0
R/W
0
5
TBSEL1
R/W
0
4
TBSEL0
R/W
0
3
2
1
0
WDTEN3 WDTEN2 WDTEN1 WDTEN0
R/W
1
R/W
0
R/W
1
R/W
0
POR
Bit 7, 6
Bit 5, 4
INTEG1, INTEG0: External interrupt edge type
00: disable
01: rising edge trigger
10: falling edge trigger
11: dual edge trigger
TBSEL1, TBSEL0: Time base period selection
00: 210 ´ (1/fTP)
01: 211 ´ (1/fTP)
10: 212 ´ (1/fTP)
11: 213 ´ (1/fTP)
Bit 3~0
WDTEN3, WDTEN2, WDTEN1, WDTEN0: WDT function enable
1010: WDT disabled
Other values: WDT enabled - Recommended value is 0101
If the ²watchdog timer enable² is configuration option is selected, then the watchdog timer will
always be enabled and the WDTEN3~WDTEN0 control bits will have no effect.
REMAP Register
Bit
Name
R/W
7
¾
¾
0
6
¾
¾
0
5
¾
¾
0
4
¾
¾
0
3
REMP3
R/W
0
2
REMP2
R/W
0
1
REMP1
R/W
0
0
REMP0
R/W
0
POR
REMAP Register - HT46R064D
Bit 7~4
Bit 3~2
unimplemented, read as ²0²
REMP3, REMP2:
00: INT/TC0/PFD/PWM0 pin-shared with PA0/PA2/PA1/PA7
01: INT/TC0/PFD/PWM0 pin-shared with PA3/PA2/PA1/PA4
10: INT/TC0/PFD/PWM0 pin-shared with PB1/PB2/PB0/PA7
Bit 1
Bit 0
unimplemented, read as ²0²
REMP0:
0: AN3 pin-shared with PA5
1: AN3 pin-shared with PA3
REMAP Register - HT46R065D
Bit 7~4
Bit 3~2
unimplemented, read as ²0²
REMP3, REMP2:
00: INT/TC0/TC1/PFD/PWM0 pin-shared with PA0/PA2/PA6/PA1/PA7
01: unused
10: unused
11: INT/TC0/TC1/PFD/PWM0 pin-shared with PC3/PC4/PA6/PC2/PA7
Bit 1~0
unimplemented, read as ²0²
Rev. 1.00
25
January 12, 2011