HT46R47E/HT46C47E
Options
Low Voltage Reset - LVR
The following table shows all kinds of options in the
microcontroller. All of the options must be defined to en-
sure proper system functioning.
The microcontroller provides low voltage reset circuit in
order to monitor the supply voltage of the device. If the
supply voltage of the device is within the range
0.9V~3.3V, such as changing a battery, the LVR will au-
tomatically reset the device internally.
No.
1
Options
WDT clock source: WDTOSC or fTID
WDT function: enable or disable
The LVR includes the following specifications:
2
·
The low voltage (0.9V~VLVR) has to remain in their
original state to exceed 1ms. If the low voltage state
does not exceed 1ms, the LVR will ignore it and do not
perform a reset function.
CLRWDT instruction(s): one or two clear WDT
instruction(s)
3
4
5
6
7
8
System oscillator: RC or crystal
Pull-high resistors (PA, PB, PD): none or pull-high
PWM enable or disable
·
The LVR uses the ²OR² function with the external RES
signal to perform chip reset.
The relationship between VDD and VLVR is shown below.
PA0~PA7 wake-up: enable or disable
PFD enable or disable
V
D
D
V
O P R
5
.
5
V
5
.
5
V
Low voltage reset selection: enable or disable
LVR function.
9
V
L
V
R
3
.
0
V
2
.
2
V
0
.
9
V
Note:
V
OPR is the voltage range for proper chip
operation at 4MHz system clock.
V
D
D
5
.
5
V
L
V
R
D
e
t
e
c
t
V
o
l
t
a
g
e
V
L
V
R
0
.
9
0
V
V
R
e
s
e
t
S
i
g
n
a
l
R
e
s
e
t
N
o
r
m
a
l
O
p
e
r
a
t
i
o
n
R
e
s
e
t
*
1
*
2
Low Voltage Reset
Note: *1: To make sure that the system oscillator has stabilized, the SST provides an extra delay of 1024 system
clock pulses before entering the normal operation.
*2: Since the low voltage has to maintain in its original state and exceed 1ms, therefore 1ms delay enter the
reset mode.
Rev. 1.30
21
July 13, 2005