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HT46R01 参数 Datasheet PDF下载

HT46R01图片预览
型号: HT46R01
PDF下载: 下载PDF文件 查看货源
内容描述: 10引脚MSOP A / D型8位OTP MCU [10-Pin MSOP A/D Type 8-Bit OTP MCU]
分类和应用:
文件页数/大小: 60 页 / 482 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT46R01/HT46R02/HT46R03  
tempreg1  
tempreg2  
db  
db  
:
?
?
; temporary register #1  
; temporary register #2  
:
mov  
mov  
a,06h  
; initialise table pointer - note that this address  
; is referenced  
tblp,a  
:
:
; to the last page or present page  
tabrdl  
tempreg1  
; transfers value in table referenced by table pointer  
; to tempregl  
; data at prog. memory address ²706H² transferred to  
; tempreg1 and TBLH  
dec  
tblp  
; reduce value of table pointer by one  
tabrdl  
tempreg2  
; transfers value in table referenced by table pointer  
; to tempreg2  
; data at prog.memory address ²705H² transferred to  
; tempreg2 and TBLH  
; in this example the data ²1AH² is transferred to  
; tempreg1 and data ²0FH² to register tempreg2  
; the value ²00H² will be transferred to the high byte  
; register TBLH  
:
:
org  
dc  
700h  
; sets initial address of last page (for HT46R02)  
00Ah, 00Bh, 00Ch, 00Dh, 00Eh, 00Fh, 01Ah, 01Bh  
:
:
Because the TBLH register is a read-only register and  
cannot be restored, care should be taken to ensure its  
protection if both the main routine and Interrupt Service  
Routine use the table read instructions. If using the table  
read instructions, the Interrupt Service Routines may  
change the value of TBLH and subsequently cause er-  
rors if used again by the main routine. As a rule it is rec-  
ommended that simultaneous use of the table read  
instructions should be avoided. However, in situations  
where simultaneous use cannot be avoided, the inter-  
rupts should be disabled prior to the execution of any  
main routine table-read instructions. Note that all table  
related instructions require two instruction cycles to  
complete their operation.  
Data Memory  
The Data Memory is a volatile area of 8-bit wide RAM  
internal memory and is the location where temporary in-  
formation is stored. Divided into two sections, the first of  
these is an area of RAM where special function registers  
are located. These registers have fixed locations and  
are necessary for correct operation of the device. Many  
of these registers can be read from and written to di-  
rectly under program control, however, some remain  
protected from user manipulation. The second area of  
Data Memory is reserved for general purpose use. All  
locations within this area are read and write accessible  
under program control.  
Table Location Bits  
Instruction  
b11  
TABRDC [m] PC11 PC10 PC9  
TABRDL [m]  
b10  
b9  
b8  
PC8  
1
b7  
@7  
@7  
b6  
@6  
@6  
b5  
@5  
@5  
b4  
@4  
@4  
b3  
@3  
@3  
b2  
@2  
@2  
b1  
@1  
@1  
b0  
@0  
@0  
1
1
1
Table Location  
Note: PC11~PC8: Current Program Counter bits  
@7~@0: Table Pointer TBLP bits  
For the HT46R03 devices, the Table address location is 12 bits, i.e. from b11~b0.  
For the HT46R02 devices, the Table address location is 11 bits, i.e. from b10~b0.  
For the HT46R01 devices, the Table address location is 10 bits, i.e. from b9~b0.  
Rev. 1.00  
10  
September 21, 2007  
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