HT45R38
If the timer/event counter is not running, writing data to
the timer/event counter preload register also reloads
that data into the timer/event counter. But if the
timer/event counter is already running, data written to
the timer/event counter is kept only in the timer/event
counter preload register. The timer/event counter will
continue running until an overflow occurs and only then
will the data be loaded into the timer/event counter.
When the timer/event counter is read, the clock is
blocked to avoid errors, and as this may results in a
counting error, it should be taken into account by the
programmer.
Bit0~bit2 of the TMR0C register can be used to define
the timer/event counter clock division ratio. The defini-
tions are as shown.
Bit No.
Label
Function
To define the prescaler stages, T0PSC2, T0PSC1, T0PSC0=
000: fINT=fSYS
001: fINT=fSYS/2
010: fINT=fSYS/4
0~2
T0PSC0~T0PSC2 011: fINT=fSYS/8
100: fINT=fSYS/16
101: fINT=fSYS/32
110: fINT=fSYS/64
111: fINT=fSYS/128
To define the TMR0 active edge of the timer/event counter
In event counter mode (T0M1, T0M0)= (0, 1)
0: count on rising edge;
3
T0E
1: count on falling edge
In pulse width measurement mode (T0M1, T0M0)= (1, 1)
0: start counting on the falling edge, stop on the rising edge;
1: start counting on the rising edge, stop on the falling edge
4
5
T0ON
To enable or disable timer counting (0=disabled; 1=enabled)
¾
Unused bit, read as ²0²
To define the operating mode, T0M1, T0M0=
01=Event count mode (external clock)
10=Timer mode (internal clock)
11=Pulse width measurement mode
00=Unused
6
7
T0M0
T0M1
TMR0C (0EH) Register
Bit No.
Label
Function
0~2, 5
¾
Unused bit, read as ²0²
To define the TMR0 active edge of the timer/event counter
In event counter mode (T1M1, T1M0)= (0, 1)
0: count on rising edge;
3
4
T1E
1: count on falling edge
In pulse width measurement mode (T1M1, T1M0)= (1, 1)
0: start counting on the falling edge, stop on the rising edge;
1: start counting on the rising edge, stop on the falling edge
T1ON
To enable or disable timer counting (0=disabled; 1=enabled)
To define the operating mode, T0M1, T0M0=
01=Event count mode (external clock)
10=Timer mode (internal clock)
11=Pulse width measurement mode
00=Unused
6
7
T1M0
T1M1
TMR1C (11H) Register
Rev. 1.00
17
December 13, 2006
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
