Preliminary
HT45R04/HT45R04E
page. The address roll over during write from the last
byte of the current page to the first byte of the same
page. Once the device address with the read/write se-
lect bit set to one is clocked in and acknowledged by
the EEPROM, the current address data word is seri-
ally clocked out. The microcontroller should respond a
No ACK (High) signal and following stop condition (re-
fer to Current read timing).
S
e
n
d
W
r
i
t
e
C
o
m
m
a
n
d
S
e
n
d
S
t
o
p
C
o
n
d
i
t
i
o
n
t
o
I
n
i
t
i
a
t
e
W
r
i
t
e
C
y
c
l
e
S
e
n
d
S
t
a
r
t
S
e
n
d
C
o
t
r
o
l
l
B
y
t
e
·
Random read
w
i
t
h
R
/
W
=
0
Arandom read requires a dummy byte write sequence
to load in the data word address which is then clocked
in and acknowledged by the EEPROM. The
microcontroller must then generate another start con-
dition. The microcontroller now initiates a current ad-
dress read by sending a device address with the
read/write select bit high. The EEPROM acknowl-
edges the device address and serially clocks out the
data word. The microcontroller should respond with a
²no ACK² signal (high) followed by a stop condition.
(refer to Random read timing).
N
o
(
A
C
K
=
0
)
?
Y
e
s
N
e
x
t
O
p
e
r
a
t
i
o
n
Acknowledge Polling Flow
·
·
Read operations
·
Sequential read
The data EEPROM supports three read operations,
namely, current address read, random address read
and sequential read. During read operation execution,
the read/write select bit should be set to ²1².
Sequential reads are initiated by either a current address
read or a random address read. After the microcontroller
receives a data word, it responds with an acknowledg-
ment. As long as the EEPROM receives an acknowledg-
ment, it will continue to increment the data word address
and serially clock out sequential data words. When the
memory address limit is reached, the data word address
will roll over and the sequential read continues. The se-
quential read operation is terminated when the
microcontroller responds with a ²no ACK² signal (high) fol-
lowed by a stop condition.
Current address read
The internal data word address counter maintains the
last address accessed during the last read or write op-
eration, incremented by one. This address stays valid
between operations as long as the chip power is main-
tained. The address roll over during read from the last
byte of the last memory page to the first byte of the first
D
e
v
i
c
e
a
d
d
r
e
s
s
D
A
T
A
S
t
o
p
S
D
A
S
P
S
t
a
r
t
A
C
K
N
o
A
C
K
Current Read Timing
D
e
v
i
c
e
a
d
d
r
e
s
s
W
o
r
d
a
d
d
r
e
s
s
D
e
v
i
c
e
a
d
d
r
e
s
s
D
A
T
A
S
t
o
p
S
S
P
S
D
A
A
C
K
A
C
K
A
C
K
N
o
A
C
K
S
t
a
r
t
S
t
a
r
t
Random Read Timing
D
e
v
i
c
e
a
d
d
r
e
s
s
D
A
T
A
n
D
A
T
A
n
+
1
D
A
T
A
n
+
x
S
t
o
p
S
P
S
D
A
S
t
a
r
t
A
C
K
A
C
K
N
o
A
C
K
Sequential Read Timing
Rev. 0.00
22
December 30, 2004
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
